From: Sam Shih <sam.shih@mediatek.com>
This commit adds dt-binding documentation of mmc for Mediatek MT7986 SoC
Platform.
Add SoC specific section for defining clock configuration.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
v3:
- drop assigned-clocks/assigned-clock-parents
- fix clock description
v4:
- update binding for mt7986 (new mtk version)
- squashed part 1 (compatible) and 3 (SoC specific clock config)
and so dropped Ack from Rob for 1rst Part
v5:
- drop quotes around clock names
---
.../devicetree/bindings/mmc/mtk-sd.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 0cedeb12892d..6f8ecb4788eb 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -20,6 +20,7 @@ properties:
- mediatek,mt6795-mmc
- mediatek,mt7620-mmc
- mediatek,mt7622-mmc
+ - mediatek,mt7986-mmc
- mediatek,mt8135-mmc
- mediatek,mt8173-mmc
- mediatek,mt8183-mmc
@@ -237,6 +238,31 @@ allOf:
reg:
minItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt7986-mmc
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ items:
+ - description: source clock
+ - description: HCLK which used for host
+ - description: independent source clock gate
+ - description: bus clock used for internal register access (required for MSDC0/3).
+ - description: msdc subsys clock gate
+ clock-names:
+ minItems: 3
+ items:
+ - const: source
+ - const: hclk
+ - const: source_cg
+ - const: bus_clk
+ - const: sys_cg
+
- if:
properties:
compatible:
--
2.34.1