[PATCH v2 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195

Tinghan Shen posted 3 patches 1 year, 11 months ago
There is a newer version of this series
[PATCH v2 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195
Posted by Tinghan Shen 1 year, 11 months ago
From: Jianjun Wang <jianjun.wang@mediatek.com>

In order to support mt8195 pcie node, update the yaml to support new
properties of iommu and power-domain, and update the reset-names
property to allow only one 'mac' name.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
---
 .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..af271018b134 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -70,14 +70,21 @@ properties:
     minItems: 1
     maxItems: 8
 
+  iommu-map:
+    maxItems: 1
+
+  iommu-map-mask:
+    maxItems: 1
+
   resets:
     minItems: 1
     maxItems: 2
 
   reset-names:
-    minItems: 1
-    items:
-      - const: phy
+    oneOf:
+      - items:
+          - const: phy
+          - const: mac
       - const: mac
 
   clocks:
@@ -107,6 +114,9 @@ properties:
     items:
       - const: pcie-phy
 
+  power-domains:
+    maxItems: 1
+
   '#interrupt-cells':
     const: 1
 
-- 
2.18.0
Re: [PATCH v2 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195
Posted by Rob Herring 1 year, 11 months ago
On Thu, Oct 20, 2022 at 07:19:23PM +0800, Tinghan Shen wrote:
> From: Jianjun Wang <jianjun.wang@mediatek.com>
> 
> In order to support mt8195 pcie node, update the yaml to support new
> properties of iommu and power-domain, and update the reset-names
> property to allow only one 'mac' name.
> 
> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
> ---
>  .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index c00be39af64e..af271018b134 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -70,14 +70,21 @@ properties:
>      minItems: 1
>      maxItems: 8
>  
> +  iommu-map:
> +    maxItems: 1
> +
> +  iommu-map-mask:
> +    maxItems: 1

This is not a array. It needs a value. Must be 0 if iommu-map only has 1 
entry? Or you only support 1 downstream device?

> +
>    resets:
>      minItems: 1
>      maxItems: 2
>  
>    reset-names:
> -    minItems: 1
> -    items:
> -      - const: phy
> +    oneOf:
> +      - items:
> +          - const: phy
> +          - const: mac
>        - const: mac
>  
>    clocks:
> @@ -107,6 +114,9 @@ properties:
>      items:
>        - const: pcie-phy
>  
> +  power-domains:
> +    maxItems: 1
> +
>    '#interrupt-cells':
>      const: 1
>  
> -- 
> 2.18.0
> 
>
Re: [PATCH v2 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195
Posted by Jianjun Wang 1 year, 11 months ago
Hi Rob,

Thanks for your review.

On Thu, 2022-10-20 at 21:26 -0500, Rob Herring wrote:
> On Thu, Oct 20, 2022 at 07:19:23PM +0800, Tinghan Shen wrote:
> > From: Jianjun Wang <jianjun.wang@mediatek.com>
> > 
> > In order to support mt8195 pcie node, update the yaml to support
> > new
> > properties of iommu and power-domain, and update the reset-names
> > property to allow only one 'mac' name.
> > 
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > Signed-off-by: TingHan Shen <tinghan.shen@mediatek.com>
> > ---
> >  .../bindings/pci/mediatek-pcie-gen3.yaml         | 16
> > +++++++++++++---
> >  1 file changed, 13 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml
> > index c00be39af64e..af271018b134 100644
> > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > @@ -70,14 +70,21 @@ properties:
> >      minItems: 1
> >      maxItems: 8
> >  
> > +  iommu-map:
> > +    maxItems: 1
> > +
> > +  iommu-map-mask:
> > +    maxItems: 1
> 
> This is not a array. It needs a value. Must be 0 if iommu-map only
> has 1 
> entry? Or you only support 1 downstream device?

We only has 1 entry for iommu-map, we'll change it to 0 in the next
version.

Thanks.

> 
> > +
> >    resets:
> >      minItems: 1
> >      maxItems: 2
> >  
> >    reset-names:
> > -    minItems: 1
> > -    items:
> > -      - const: phy
> > +    oneOf:
> > +      - items:
> > +          - const: phy
> > +          - const: mac
> >        - const: mac
> >  
> >    clocks:
> > @@ -107,6 +114,9 @@ properties:
> >      items:
> >        - const: pcie-phy
> >  
> > +  power-domains:
> > +    maxItems: 1
> > +
> >    '#interrupt-cells':
> >      const: 1
> >  
> > -- 
> > 2.18.0
> > 
> >