[PATCH] crypto: hisilicon/sec - enabling clock gating of the address prefetch module

Weili Qian posted 1 patch 3 years, 6 months ago
drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] crypto: hisilicon/sec - enabling clock gating of the address prefetch module
Posted by Weili Qian 3 years, 6 months ago
Change the value of clock gating register to 0x7fff to enable
clock gating of the address prefetch module. When the device is
idle, the clock is turned off to save power.

Signed-off-by: Weili Qian <qianweili@huawei.com>
---
 drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 3705412bac5f..6eb8a16ba0a7 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -55,7 +55,7 @@
 #define SEC_CONTROL_REG		0x301200
 #define SEC_DYNAMIC_GATE_REG		0x30121c
 #define SEC_CORE_AUTO_GATE		0x30212c
-#define SEC_DYNAMIC_GATE_EN		0x7bff
+#define SEC_DYNAMIC_GATE_EN		0x7fff
 #define SEC_CORE_AUTO_GATE_EN		GENMASK(3, 0)
 #define SEC_CLK_GATE_ENABLE		BIT(3)
 #define SEC_CLK_GATE_DISABLE		(~BIT(3))
-- 
2.33.0
Re: [PATCH] crypto: hisilicon/sec - enabling clock gating of the address prefetch module
Posted by Herbert Xu 3 years, 5 months ago
On Sat, Sep 24, 2022 at 06:34:45PM +0800, Weili Qian wrote:
> Change the value of clock gating register to 0x7fff to enable
> clock gating of the address prefetch module. When the device is
> idle, the clock is turned off to save power.
> 
> Signed-off-by: Weili Qian <qianweili@huawei.com>
> ---
>  drivers/crypto/hisilicon/sec2/sec_main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt