[PATCH v2 1/3] dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA

Akhil R posted 3 patches 3 years, 6 months ago
There is a newer version of this series
[PATCH v2 1/3] dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA
Posted by Akhil R 3 years, 6 months ago
Add dma-channel-mask property in Tegra GPCDMA document.

The property would help to specify the channels to be used in
kernel and reserve few for the firmware. This was previously
achieved by limiting the channel number to 31 in the driver.
Now since we can list all 32 channels, update the interrupts
property as well to list all 32 interrupts.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
 .../devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml   | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
index 7e575296df0c..31724cda074e 100644
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
@@ -39,7 +39,7 @@ properties:
       Should contain all of the per-channel DMA interrupts in
       ascending order with respect to the DMA channel index.
     minItems: 1
-    maxItems: 31
+    maxItems: 32
 
   resets:
     maxItems: 1
@@ -52,6 +52,9 @@ properties:
 
   dma-coherent: true
 
+  dma-channel-mask:
+    maxItems: 1
+
 required:
   - compatible
   - reg
@@ -60,6 +63,7 @@ required:
   - reset-names
   - "#dma-cells"
   - iommus
+  - dma-channel-mask
 
 additionalProperties: false
 
@@ -108,5 +112,6 @@ examples:
         #dma-cells = <1>;
         iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
         dma-coherent;
+        dma-channel-mask = <0xfffffffe>;
     };
 ...
-- 
2.17.1
Re: [PATCH v2 1/3] dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA
Posted by Jon Hunter 3 years, 6 months ago
On 19/09/2022 12:25, Akhil R wrote:
> Add dma-channel-mask property in Tegra GPCDMA document.
> 
> The property would help to specify the channels to be used in
> kernel and reserve few for the firmware. This was previously
> achieved by limiting the channel number to 31 in the driver.
> Now since we can list all 32 channels, update the interrupts
> property as well to list all 32 interrupts.
> 
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
>   .../devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml   | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
> index 7e575296df0c..31724cda074e 100644
> --- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
> @@ -39,7 +39,7 @@ properties:
>         Should contain all of the per-channel DMA interrupts in
>         ascending order with respect to the DMA channel index.
>       minItems: 1
> -    maxItems: 31
> +    maxItems: 32
>   
>     resets:
>       maxItems: 1
> @@ -52,6 +52,9 @@ properties:
>   
>     dma-coherent: true
>   
> +  dma-channel-mask:
> +    maxItems: 1
> +
>   required:
>     - compatible
>     - reg
> @@ -60,6 +63,7 @@ required:
>     - reset-names
>     - "#dma-cells"
>     - iommus
> +  - dma-channel-mask
>   
>   additionalProperties: false
>   
> @@ -108,5 +112,6 @@ examples:
>           #dma-cells = <1>;
>           iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
>           dma-coherent;
> +        dma-channel-mask = <0xfffffffe>;
>       };
>   ...


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon

-- 
nvpublic