Il 15/09/22 09:58, Bo-Chen Chen ha scritto:
> Add edptx and dptx nodes for MT8195.
>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25 ++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 93e6a106a9b8..6f3f9bf3dc54 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1241,6 +1241,9 @@
> reg = <0x189 0x2>;
> bits = <7 5>;
> };
> + dp_calibration: dp-data@1ac {
> + reg = <0x1ac 0x10>;
> + };
> };
>
> u3phy2: t-phy@11c40000 {
> @@ -2178,5 +2181,27 @@
> clock-names = "engine", "pixel", "pll";
> status = "disabled";
> };
> +
> + edp_tx: edp-tx@1c500000 {
> + status = "disabled";
> + compatible = "mediatek,mt8195-edp-tx";
> + reg = <0 0x1c500000 0 0x8000>;
> + nvmem-cells = <&dp_calibration>;
> + nvmem-cell-names = "dp_calibration_data";
> + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
> + interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
> + max-linkrate-mhz = <8100>;
> + };
> +
> + dp_tx: dp-tx@1c600000 {
> + compatible = "mediatek,mt8195-dp-tx";
> + reg = <0 0x1c600000 0 0x8000>;
> + nvmem-cells = <&dp_calibration>;
> + nvmem-cell-names = "dp_calibration_data";
> + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>;
> + interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;
> + status = "disabled";
> + max-linkrate-mhz = <8100>;
max-linkrate-mhz should go before status.
> + };
> };
> };