Robert Richter wrote:
> In RCD mode the CXL mem dev may be detected on the PCI bus before a
> CXL host is brought up. This may cause a CXL mem initialization
> failure as it expects the CXL host already detected.
This is not unique to RCD mode. It is mitigated by the cxl_bus_rescan()
at the completion of cxl_acpi_probe().
> Address this by
> specifying the module dependencies using MODULE_SOFTDEP().
>
> The following additional dependencies exist:
>
> * cxl_mem depends on cxl_acpi: The CXL hosts must be discovered
> before the CXL device is initialized.
>
> * cxl_acpi depends on cxl_port: The acpi driver adds ports to the cxl
> bus, the port driver should be loaded before. This might also work
> if modules are loaded in different order, but a) it aligns with the
> existing cxl_mem/cxl_port softdep and b) it always guarantees a fix
> module load order.
Why does a fixed module load order matter?
>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> ---
> drivers/cxl/acpi.c | 1 +
> drivers/cxl/mem.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index 56b2d222afcc..63a1cb295c07 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -834,3 +834,4 @@ module_exit(cxl_host_exit);
> MODULE_LICENSE("GPL v2");
> MODULE_IMPORT_NS(CXL);
> MODULE_IMPORT_NS(ACPI);
> +MODULE_SOFTDEP("pre: cxl_port");
The only reason cxl_acpi would need to preload cxl_port is if it wanted
to do something like:
port = devm_cxl_add_port(...);
if (port->dev.driver)
/* do something with an enabled port */
else
/* do something else if the port failed to enable */
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index 64ccf053d32c..ae13ec7d9894 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -128,3 +128,4 @@ MODULE_ALIAS_CXL(CXL_DEVICE_MEMORY_EXPANDER);
> * endpoint registration.
> */
> MODULE_SOFTDEP("pre: cxl_port");
> +MODULE_SOFTDEP("pre: cxl_acpi");
There is no strict requirement that CXL topologies be limited to ACPI
platforms. Per above, the cxl_mem driver will attach when the CXL root
device finally appears, and async out-of-order arrival is ok.