[PATCH v6 2/6] LoongArch: Adjust CFLAGS for CONFIG_AS_HAS_EXPLICIT_RELOCS

Xi Ruoyao posted 6 patches 3 years, 7 months ago
There is a newer version of this series
[PATCH v6 2/6] LoongArch: Adjust CFLAGS for CONFIG_AS_HAS_EXPLICIT_RELOCS
Posted by Xi Ruoyao 3 years, 7 months ago
If explicit relocation hints is used by the toolchain, -Wa,-mla-*
options will be useless for C code.  Only use them for
!CONFIG_AS_HAS_EXPLICIT_RELOCS.

Replace "la" with "la.pcrel" in head.S to keep the semantic consistent
with new and old toolchains for the low level startup code.

Remove -fplt because it's the default for all known LoongArch C
compilers.

The behavior with different assemblers and compilers are summarized in
the following table:

AS has            CC has
explicit reloc    explicit reloc    Behavior
==============================================================
No                No                Use la.* macros.
                                    No change from Linux 6.0.
--------------------------------------------------------------
No                Yes               Disable explicit reloc.
                                    No change from Linux 6.0.
--------------------------------------------------------------
Yes               No                Not supported.
--------------------------------------------------------------
Yes               Yes               Use explicit relocs.
                                    No -Wa,-mla* options.
==============================================================

Signed-off-by: Xi Ruoyao <xry111@xry111.site>
---
 arch/loongarch/Makefile      | 19 ++++++++++++++++++-
 arch/loongarch/kernel/head.S | 10 +++++-----
 2 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
index 7051a95f7f31..1563747c4fa8 100644
--- a/arch/loongarch/Makefile
+++ b/arch/loongarch/Makefile
@@ -40,10 +40,27 @@ endif
 
 cflags-y			+= -G0 -pipe -msoft-float
 LDFLAGS_vmlinux			+= -G0 -static -n -nostdlib
+
+# When the assembler supports explicit relocation hint, we must use it.
+# GCC may have -mexplicit-relocs off by default if it was built with an old
+# assembler, so we force it via an option.
+#
+# When the assembler does not supports explicit relocation hint, we can't use
+# it.  Disable it if the compiler supports it.
+#
+# If you've seen "unknown reloc hint" message building the kernel and you are
+# now wondering why "-mexplicit-relocs" is not wrapped with cc-option: the
+# combination of a "new" assembler and "old" compiler is not supported.  Either
+# upgrade the compiler or downgrade the assembler.
+ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS
+cflags-y			+= -mexplicit-relocs
+else
+cflags-y			+= $(call cc-option,-mno-explicit-relocs)
 KBUILD_AFLAGS_KERNEL		+= -Wa,-mla-global-with-pcrel
 KBUILD_CFLAGS_KERNEL		+= -Wa,-mla-global-with-pcrel
 KBUILD_AFLAGS_MODULE		+= -Wa,-mla-global-with-abs
-KBUILD_CFLAGS_MODULE		+= -fplt -Wa,-mla-global-with-abs,-mla-local-with-abs
+KBUILD_CFLAGS_MODULE		+= -Wa,-mla-global-with-abs,-mla-local-with-abs
+endif
 
 cflags-y += -ffreestanding
 cflags-y += $(call cc-option, -mno-check-zero-division)
diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S
index 01bac62a6442..eb3f641d5915 100644
--- a/arch/loongarch/kernel/head.S
+++ b/arch/loongarch/kernel/head.S
@@ -55,17 +55,17 @@ SYM_CODE_START(kernel_entry)			# kernel entry point
 	li.w		t0, 0x00		# FPE=0, SXE=0, ASXE=0, BTE=0
 	csrwr		t0, LOONGARCH_CSR_EUEN
 
-	la		t0, __bss_start		# clear .bss
+	la.pcrel	t0, __bss_start		# clear .bss
 	st.d		zero, t0, 0
-	la		t1, __bss_stop - LONGSIZE
+	la.pcrel	t1, __bss_stop - LONGSIZE
 1:
 	addi.d		t0, t0, LONGSIZE
 	st.d		zero, t0, 0
 	bne		t0, t1, 1b
 
-	la		t0, fw_arg0
+	la.pcrel	t0, fw_arg0
 	st.d		a0, t0, 0		# firmware arguments
-	la		t0, fw_arg1
+	la.pcrel	t0, fw_arg1
 	st.d		a1, t0, 0
 
 	/* KSave3 used for percpu base, initialized as 0 */
@@ -73,7 +73,7 @@ SYM_CODE_START(kernel_entry)			# kernel entry point
 	/* GPR21 used for percpu base (runtime), initialized as 0 */
 	move		u0, zero
 
-	la		tp, init_thread_union
+	la.pcrel	tp, init_thread_union
 	/* Set the SP after an empty pt_regs.  */
 	PTR_LI		sp, (_THREAD_SIZE - 32 - PT_SIZE)
 	PTR_ADD		sp, sp, tp
-- 
2.37.0
Re: [PATCH v6 2/6] LoongArch: Adjust CFLAGS for CONFIG_AS_HAS_EXPLICIT_RELOCS
Posted by Huacai Chen 3 years, 7 months ago
Hi, Ruoyao,

On Mon, Aug 29, 2022 at 9:35 PM Xi Ruoyao <xry111@xry111.site> wrote:
>
> If explicit relocation hints is used by the toolchain, -Wa,-mla-*
> options will be useless for C code.  Only use them for
> !CONFIG_AS_HAS_EXPLICIT_RELOCS.
>
> Replace "la" with "la.pcrel" in head.S to keep the semantic consistent
> with new and old toolchains for the low level startup code.
>
> Remove -fplt because it's the default for all known LoongArch C
> compilers.
>
> The behavior with different assemblers and compilers are summarized in
> the following table:
>
> AS has            CC has
> explicit reloc    explicit reloc    Behavior
> ==============================================================
> No                No                Use la.* macros.
>                                     No change from Linux 6.0.
> --------------------------------------------------------------
> No                Yes               Disable explicit reloc.
>                                     No change from Linux 6.0.
> --------------------------------------------------------------
> Yes               No                Not supported.
> --------------------------------------------------------------
> Yes               Yes               Use explicit relocs.
>                                     No -Wa,-mla* options.
> ==============================================================
>
> Signed-off-by: Xi Ruoyao <xry111@xry111.site>
> ---
>  arch/loongarch/Makefile      | 19 ++++++++++++++++++-
>  arch/loongarch/kernel/head.S | 10 +++++-----
>  2 files changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> index 7051a95f7f31..1563747c4fa8 100644
> --- a/arch/loongarch/Makefile
> +++ b/arch/loongarch/Makefile
> @@ -40,10 +40,27 @@ endif
>
>  cflags-y                       += -G0 -pipe -msoft-float
>  LDFLAGS_vmlinux                        += -G0 -static -n -nostdlib
> +
> +# When the assembler supports explicit relocation hint, we must use it.
> +# GCC may have -mexplicit-relocs off by default if it was built with an old
> +# assembler, so we force it via an option.
> +#
> +# When the assembler does not supports explicit relocation hint, we can't use
> +# it.  Disable it if the compiler supports it.
> +#
> +# If you've seen "unknown reloc hint" message building the kernel and you are
> +# now wondering why "-mexplicit-relocs" is not wrapped with cc-option: the
> +# combination of a "new" assembler and "old" compiler is not supported.  Either
> +# upgrade the compiler or downgrade the assembler.
> +ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS
> +cflags-y                       += -mexplicit-relocs
> +else
> +cflags-y                       += $(call cc-option,-mno-explicit-relocs)
>  KBUILD_AFLAGS_KERNEL           += -Wa,-mla-global-with-pcrel
>  KBUILD_CFLAGS_KERNEL           += -Wa,-mla-global-with-pcrel
>  KBUILD_AFLAGS_MODULE           += -Wa,-mla-global-with-abs
> -KBUILD_CFLAGS_MODULE           += -fplt -Wa,-mla-global-with-abs,-mla-local-with-abs
> +KBUILD_CFLAGS_MODULE           += -Wa,-mla-global-with-abs,-mla-local-with-abs
Though -fplt is the default, keep it can make code clearer.

Huacai
> +endif
>
>  cflags-y += -ffreestanding
>  cflags-y += $(call cc-option, -mno-check-zero-division)
> diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S
> index 01bac62a6442..eb3f641d5915 100644
> --- a/arch/loongarch/kernel/head.S
> +++ b/arch/loongarch/kernel/head.S
> @@ -55,17 +55,17 @@ SYM_CODE_START(kernel_entry)                        # kernel entry point
>         li.w            t0, 0x00                # FPE=0, SXE=0, ASXE=0, BTE=0
>         csrwr           t0, LOONGARCH_CSR_EUEN
>
> -       la              t0, __bss_start         # clear .bss
> +       la.pcrel        t0, __bss_start         # clear .bss
>         st.d            zero, t0, 0
> -       la              t1, __bss_stop - LONGSIZE
> +       la.pcrel        t1, __bss_stop - LONGSIZE
>  1:
>         addi.d          t0, t0, LONGSIZE
>         st.d            zero, t0, 0
>         bne             t0, t1, 1b
>
> -       la              t0, fw_arg0
> +       la.pcrel        t0, fw_arg0
>         st.d            a0, t0, 0               # firmware arguments
> -       la              t0, fw_arg1
> +       la.pcrel        t0, fw_arg1
>         st.d            a1, t0, 0
>
>         /* KSave3 used for percpu base, initialized as 0 */
> @@ -73,7 +73,7 @@ SYM_CODE_START(kernel_entry)                  # kernel entry point
>         /* GPR21 used for percpu base (runtime), initialized as 0 */
>         move            u0, zero
>
> -       la              tp, init_thread_union
> +       la.pcrel        tp, init_thread_union
>         /* Set the SP after an empty pt_regs.  */
>         PTR_LI          sp, (_THREAD_SIZE - 32 - PT_SIZE)
>         PTR_ADD         sp, sp, tp
> --
> 2.37.0
>
>