[PATCH] arch_topology: Silence early cacheinfo errors when non-existent

Florian Fainelli posted 1 patch 6 days ago
drivers/base/arch_topology.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] arch_topology: Silence early cacheinfo errors when non-existent
Posted by Florian Fainelli 6 days ago
Architectures which do not have cacheinfo such as ARM 32-bit would spit
out the following during boot:

 Early cacheinfo failed, ret = -2

Treat -ENOENT specifically to silence this error since it means that the
platform does not support reporting its cache information.

Fixes: 3fcbf1c77d08 ("arch_topology: Fix cache attributes detection in the CPU hotplug path")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/base/arch_topology.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
index 0424b59b695e..eaa1b8d2d39d 100644
--- a/drivers/base/arch_topology.c
+++ b/drivers/base/arch_topology.c
@@ -735,7 +735,7 @@ void update_siblings_masks(unsigned int cpuid)
 	int cpu, ret;
 
 	ret = detect_cache_attributes(cpuid);
-	if (ret)
+	if (ret && ret != -ENOENT)
 		pr_info("Early cacheinfo failed, ret = %d\n", ret);
 
 	/* update core and thread sibling masks */
-- 
2.25.1
Re: [PATCH] arch_topology: Silence early cacheinfo errors when non-existent
Posted by Michael Walle 1 day, 12 hours ago
> Architectures which do not have cacheinfo such as ARM 32-bit would spit
> out the following during boot:
> 
>  Early cacheinfo failed, ret = -2
> 
> Treat -ENOENT specifically to silence this error since it means that the
> platform does not support reporting its cache information.
> 
> Fixes: 3fcbf1c77d08 ("arch_topology: Fix cache attributes detection in the CPU hotplug path")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Thanks!
Tested-by: Michael Walle <michael@walle.cc>

-michael
Re: [PATCH] arch_topology: Silence early cacheinfo errors when non-existent
Posted by Conor.Dooley@microchip.com 5 days, 5 hours ago
On 06/08/2022 00:07, Florian Fainelli wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Architectures which do not have cacheinfo such as ARM 32-bit would spit
> out the following during boot:
> 
>  Early cacheinfo failed, ret = -2
> 
> Treat -ENOENT specifically to silence this error since it means that the
> platform does not support reporting its cache information.

Makes sense to me. Maybe we could soften the wording for failures on the
platforms that do support it since early cacheinfo failures (at least on
RISC-V) appear harmless - but that's for another day.
FWIW:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

> 
> Fixes: 3fcbf1c77d08 ("arch_topology: Fix cache attributes detection in the CPU hotplug path")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
>  drivers/base/arch_topology.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
> index 0424b59b695e..eaa1b8d2d39d 100644
> --- a/drivers/base/arch_topology.c
> +++ b/drivers/base/arch_topology.c
> @@ -735,7 +735,7 @@ void update_siblings_masks(unsigned int cpuid)
>         int cpu, ret;
> 
>         ret = detect_cache_attributes(cpuid);
> -       if (ret)
> +       if (ret && ret != -ENOENT)
>                 pr_info("Early cacheinfo failed, ret = %d\n", ret);
> 
>         /* update core and thread sibling masks */
> --
> 2.25.1
> 

Re: [PATCH] arch_topology: Silence early cacheinfo errors when non-existent
Posted by Sudeep Holla 5 days, 6 hours ago
On Fri, Aug 05, 2022 at 04:07:36PM -0700, Florian Fainelli wrote:
> Architectures which do not have cacheinfo such as ARM 32-bit would spit
> out the following during boot:
> 
>  Early cacheinfo failed, ret = -2
> 
> Treat -ENOENT specifically to silence this error since it means that the
> platform does not support reporting its cache information.
>

Makes sense, I wanted to send something similar after testing on some
platforms without cacheinfo like Qemu.

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep