[v2] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge

[PATCH v2] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge

Posted by Pali Rohár 3 years, 9 months ago

Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via
emulated bridge.

After this change Subsystem ID is visible in lspci output at line:

  Capabilities: [40] Subsystem

Signed-off-by: Pali Rohár <pali@kernel.org>

---
Changes in v2:
* Fix wrong rebase, do not add PCIE_CORE_EXP_ROM_BAR_REG
---
 drivers/pci/controller/pci-aardvark.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 74511f015168..060936ef01fe 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -32,6 +32,7 @@
 #define PCIE_CORE_DEV_ID_REG					0x0
 #define PCIE_CORE_CMD_STATUS_REG				0x4
 #define PCIE_CORE_DEV_REV_REG					0x8
+#define PCIE_CORE_SSDEV_ID_REG					0x2c
 #define PCIE_CORE_PCIEXP_CAP					0xc0
 #define PCIE_CORE_ERR_CAPCTL_REG				0x118
 #define     PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX			BIT(5)
@@ -982,6 +983,8 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
 	/* Indicates supports for Completion Retry Status */
 	bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
 
+	bridge->subsystem_vendor_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) & 0xffff;
+	bridge->subsystem_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) >> 16;
 	bridge->has_pcie = true;
 	bridge->data = pcie;
 	bridge->ops = &advk_pci_bridge_emul_ops;
-- 
2.20.1

Re: [PATCH v2] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge

Posted by Lorenzo Pieralisi 3 years, 7 months ago

On Tue, 12 Jul 2022 00:59:15 +0200, Pali Rohár wrote:
> Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via
> emulated bridge.
> 
> After this change Subsystem ID is visible in lspci output at line:
> 
>   Capabilities: [40] Subsystem
> 
> [...]

Applied to pci/aardvark, thanks!

[1/1] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge
      https://git.kernel.org/lpieralisi/pci/c/a080f9ad6045

Thanks,
Lorenzo

Re: [PATCH v2] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge

Posted by Lorenzo Pieralisi 3 years, 7 months ago

On Tue, Jul 12, 2022 at 12:59:15AM +0200, Pali Rohár wrote:
> Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via
> emulated bridge.

"Export it..." I suppose.

So in short, this patch enables support for the Subsystem Device/Vendor
ID - by reading it in the PCI controller config space and storing it
in the emulated bridge control structures, so that it is exposed in
the respective PCI capability.

Correct ?

Thanks,
Lorenzo

> After this change Subsystem ID is visible in lspci output at line:
> 
>   Capabilities: [40] Subsystem
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> 
> ---
> Changes in v2:
> * Fix wrong rebase, do not add PCIE_CORE_EXP_ROM_BAR_REG
> ---
>  drivers/pci/controller/pci-aardvark.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 74511f015168..060936ef01fe 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -32,6 +32,7 @@
>  #define PCIE_CORE_DEV_ID_REG					0x0
>  #define PCIE_CORE_CMD_STATUS_REG				0x4
>  #define PCIE_CORE_DEV_REV_REG					0x8
> +#define PCIE_CORE_SSDEV_ID_REG					0x2c
>  #define PCIE_CORE_PCIEXP_CAP					0xc0
>  #define PCIE_CORE_ERR_CAPCTL_REG				0x118
>  #define     PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX			BIT(5)
> @@ -982,6 +983,8 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
>  	/* Indicates supports for Completion Retry Status */
>  	bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
>  
> +	bridge->subsystem_vendor_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) & 0xffff;
> +	bridge->subsystem_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) >> 16;
>  	bridge->has_pcie = true;
>  	bridge->data = pcie;
>  	bridge->ops = &advk_pci_bridge_emul_ops;
> -- 
> 2.20.1
>

Re: [PATCH v2] PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge

Posted by Pali Rohár 3 years, 7 months ago

On Monday 29 August 2022 11:31:32 Lorenzo Pieralisi wrote:
> On Tue, Jul 12, 2022 at 12:59:15AM +0200, Pali Rohár wrote:
> > Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via
> > emulated bridge.
> 
> "Export it..." I suppose.

Yes, it is a typo :-(

> So in short, this patch enables support for the Subsystem Device/Vendor
> ID - by reading it in the PCI controller config space and storing it
> in the emulated bridge control structures, so that it is exposed in
> the respective PCI capability.

Yes, it reads it from internal aardvark registers and stores it into the
emulated bridge config space.

> Correct ?
> 
> Thanks,
> Lorenzo
> 
> > After this change Subsystem ID is visible in lspci output at line:
> > 
> >   Capabilities: [40] Subsystem
> > 
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > 
> > ---
> > Changes in v2:
> > * Fix wrong rebase, do not add PCIE_CORE_EXP_ROM_BAR_REG
> > ---
> >  drivers/pci/controller/pci-aardvark.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > index 74511f015168..060936ef01fe 100644
> > --- a/drivers/pci/controller/pci-aardvark.c
> > +++ b/drivers/pci/controller/pci-aardvark.c
> > @@ -32,6 +32,7 @@
> >  #define PCIE_CORE_DEV_ID_REG					0x0
> >  #define PCIE_CORE_CMD_STATUS_REG				0x4
> >  #define PCIE_CORE_DEV_REV_REG					0x8
> > +#define PCIE_CORE_SSDEV_ID_REG					0x2c
> >  #define PCIE_CORE_PCIEXP_CAP					0xc0
> >  #define PCIE_CORE_ERR_CAPCTL_REG				0x118
> >  #define     PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX			BIT(5)
> > @@ -982,6 +983,8 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
> >  	/* Indicates supports for Completion Retry Status */
> >  	bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
> >  
> > +	bridge->subsystem_vendor_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) & 0xffff;
> > +	bridge->subsystem_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) >> 16;
> >  	bridge->has_pcie = true;
> >  	bridge->data = pcie;
> >  	bridge->ops = &advk_pci_bridge_emul_ops;
> > -- 
> > 2.20.1
> >