[PATCH 0/3] microblaze: Add support for TMR Subsystem

Appana Durga Kedareswara rao posted 3 patches 3 years, 9 months ago
arch/microblaze/Kconfig                       |  10 +
.../include/asm/xilinx_mb_manager.h           |  29 ++
arch/microblaze/kernel/asm-offsets.c          |   7 +
arch/microblaze/kernel/entry.S                | 302 +++++++++++++++++-
4 files changed, 347 insertions(+), 1 deletion(-)
create mode 100644 arch/microblaze/include/asm/xilinx_mb_manager.h
[PATCH 0/3] microblaze: Add support for TMR Subsystem
Posted by Appana Durga Kedareswara rao 3 years, 9 months ago
This patch series adds support for Triple Modular Redundancy Subsystem,
Triple Modular Redundancy (TMR) Microblaze solution provides soft error
detection, correction and recovery for Microblaze cores in the system.
The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado provides
all the necessary building blocks to implement a redundant triplicated
MicroBlaze subsystem. This processing subsystem is fault-tolerant and
continues to operate nominally after encountering an error. Together
with the capability to detect and recover from errors, the implementation
ensures the reliability of the entire subsystem, for more details about
IP please refer PG268[1].

[1]: https://docs.xilinx.com/r/en-US/pg268-tmr/Triple-Modular-Redundancy-TMR-v1.0-LogiCORE-IP-Product-Guide-PG268

Appana Durga Kedareswara rao (3):
  microblaze: Add xmb_manager_register function
  microblaze: Add custom break vector handler for mb manager
  microblaze: Add support for error injection

 arch/microblaze/Kconfig                       |  10 +
 .../include/asm/xilinx_mb_manager.h           |  29 ++
 arch/microblaze/kernel/asm-offsets.c          |   7 +
 arch/microblaze/kernel/entry.S                | 302 +++++++++++++++++-
 4 files changed, 347 insertions(+), 1 deletion(-)
 create mode 100644 arch/microblaze/include/asm/xilinx_mb_manager.h

-- 
2.25.1
Re: [PATCH 0/3] microblaze: Add support for TMR Subsystem
Posted by Michal Simek 3 years, 6 months ago
po 27. 6. 2022 v 8:40 odesílatel Appana Durga Kedareswara rao
<appana.durga.rao@xilinx.com> napsal:
>
> This patch series adds support for Triple Modular Redundancy Subsystem,
> Triple Modular Redundancy (TMR) Microblaze solution provides soft error
> detection, correction and recovery for Microblaze cores in the system.
> The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado provides
> all the necessary building blocks to implement a redundant triplicated
> MicroBlaze subsystem. This processing subsystem is fault-tolerant and
> continues to operate nominally after encountering an error. Together
> with the capability to detect and recover from errors, the implementation
> ensures the reliability of the entire subsystem, for more details about
> IP please refer PG268[1].
>
> [1]: https://docs.xilinx.com/r/en-US/pg268-tmr/Triple-Modular-Redundancy-TMR-v1.0-LogiCORE-IP-Product-Guide-PG268
>
> Appana Durga Kedareswara rao (3):
>   microblaze: Add xmb_manager_register function
>   microblaze: Add custom break vector handler for mb manager
>   microblaze: Add support for error injection
>
>  arch/microblaze/Kconfig                       |  10 +
>  .../include/asm/xilinx_mb_manager.h           |  29 ++
>  arch/microblaze/kernel/asm-offsets.c          |   7 +
>  arch/microblaze/kernel/entry.S                | 302 +++++++++++++++++-
>  4 files changed, 347 insertions(+), 1 deletion(-)
>  create mode 100644 arch/microblaze/include/asm/xilinx_mb_manager.h
>
> --
> 2.25.1
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs