On 13/06/2022 12:17, Conor Dooley wrote:
> Hey Uwe,
> Got a v2 for you...
> I added some comments explaining the calculations and a documentation link
> so hopefully things are a bit easier to follow.
>
> Code wise, I went through and sorted out a bunch of issues that cycling
> through the different periods/duties threw up. Along the way I found
> some other problems - especially with the longer periods which I have
> fixed. I also added a write to the sync register in the apply function,
> which will resolve to a NOP for channels without "shadow registers".
>
> Other than that, I managed to ditch the mchp_core_pwm_registers struct
> entirely but had to add a short delay before reading back the registers
> in order to compute the duty.
>
> Thanks,
> Conor.
Ah, damn - forgot to mention the 3 sets of changes to the MAINTAINERS entry
again.. There's a change already in spi-next & another change in my patchset
sent for usb.
>
> Changes from v1:
> - account for edge "quirk" while inverted
> - block changing enabled channels' period
> - document the hardware/driver limitations
> - rearrange get_state() more logically
> - fix cast sizes in get_state()
> - fix remove() and probe error paths
> - delete mchp_core_pwm_registers
> - simplify .apply() logic
> - don't warn in calculate_base()
> - fix period calculation
> - fix duty cycle calculation
> - add COREPWM prefix to defines
> - add a documentation link
>
> Conor Dooley (2):
> pwm: add microchip soft ip corePWM driver
> MAINTAINERS: add pwm to PolarFire SoC entry
>
> MAINTAINERS | 1 +
> drivers/pwm/Kconfig | 10 +
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-microchip-core.c | 310 +++++++++++++++++++++++++++++++
> 4 files changed, 322 insertions(+)
> create mode 100644 drivers/pwm/pwm-microchip-core.c
>
>
> base-commit: 61114e734ccb804bc12561ab4020745e02c468c2