drivers/gpio/gpio-davinci.c | 83 +++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+)
From: Devarsh Thakkar <devarsht@ti.com>
Add support for system suspend/resume PM hooks, save the
register context of all the required gpio registers on suspend
and restore context on the resume.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
Changes since v2:
- Fixed grammer in the commit message
- Used GENMASK instead of using the value
- Used pm_sleep_ptr and removed __maybe_used for
system suspend/resume hooks
Changes since v1:
- Moved header include to group with other similar headers
- Removed unnecessary intializations
drivers/gpio/gpio-davinci.c | 83 +++++++++++++++++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index f960587f86a3..59c4c48d8296 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -22,6 +22,7 @@
#include <linux/platform_data/gpio-davinci.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/spinlock.h>
+#include <linux/pm_runtime.h>
#include <asm-generic/gpio.h>
@@ -62,6 +63,8 @@ struct davinci_gpio_controller {
void __iomem *regs[MAX_REGS_BANKS];
int gpio_unbanked;
int irqs[MAX_INT_PER_BANK];
+ struct davinci_gpio_regs context[MAX_REGS_BANKS];
+ u32 binten_context;
};
static inline u32 __gpio_mask(unsigned gpio)
@@ -622,6 +625,85 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
return 0;
}
+static void davinci_gpio_save_context(struct davinci_gpio_controller *chips,
+ u32 nbank)
+{
+ struct davinci_gpio_regs __iomem *g;
+ struct davinci_gpio_regs *context;
+ u32 bank;
+ void __iomem *base;
+
+ base = chips->regs[0] - offset_array[0];
+ chips->binten_context = readl_relaxed(base + BINTEN);
+
+ for (bank = 0; bank < nbank; bank++) {
+ g = chips->regs[bank];
+ context = &chips->context[bank];
+ context->dir = readl_relaxed(&g->dir);
+ context->set_data = readl_relaxed(&g->set_data);
+ context->set_rising = readl_relaxed(&g->set_rising);
+ context->set_falling = readl_relaxed(&g->set_falling);
+ }
+
+ /* Clear Bank interrupt enable bit */
+ writel_relaxed(0, base + BINTEN);
+
+ /* Clear all interrupt status registers */
+ writel_relaxed(GENMASK(31, 0), &g->intstat);
+}
+
+static void davinci_gpio_restore_context(struct davinci_gpio_controller *chips,
+ u32 nbank)
+{
+ struct davinci_gpio_regs __iomem *g;
+ struct davinci_gpio_regs *context;
+ u32 bank;
+ void __iomem *base;
+
+ base = chips->regs[0] - offset_array[0];
+
+ if (readl_relaxed(base + BINTEN) != chips->binten_context)
+ writel_relaxed(chips->binten_context, base + BINTEN);
+
+ for (bank = 0; bank < nbank; bank++) {
+ g = chips->regs[bank];
+ context = &chips->context[bank];
+ if (readl_relaxed(&g->dir) != context->dir)
+ writel_relaxed(context->dir, &g->dir);
+ if (readl_relaxed(&g->set_data) != context->set_data)
+ writel_relaxed(context->set_data, &g->set_data);
+ if (readl_relaxed(&g->set_rising) != context->set_rising)
+ writel_relaxed(context->set_rising, &g->set_rising);
+ if (readl_relaxed(&g->set_falling) != context->set_falling)
+ writel_relaxed(context->set_falling, &g->set_falling);
+ }
+}
+
+static int davinci_gpio_suspend(struct device *dev)
+{
+ struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
+ struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
+ u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
+
+ davinci_gpio_save_context(chips, nbank);
+
+ return 0;
+}
+
+static int davinci_gpio_resume(struct device *dev)
+{
+ struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
+ struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
+ u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
+
+ davinci_gpio_restore_context(chips, nbank);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_DEV_PM_OPS(davinci_gpio_dev_pm_ops, davinci_gpio_suspend,
+ davinci_gpio_resume);
+
static const struct of_device_id davinci_gpio_ids[] = {
{ .compatible = "ti,keystone-gpio", keystone_gpio_get_irq_chip},
{ .compatible = "ti,am654-gpio", keystone_gpio_get_irq_chip},
@@ -634,6 +716,7 @@ static struct platform_driver davinci_gpio_driver = {
.probe = davinci_gpio_probe,
.driver = {
.name = "davinci_gpio",
+ .pm = pm_sleep_ptr(&davinci_gpio_dev_pm_ops),
.of_match_table = of_match_ptr(davinci_gpio_ids),
},
};
--
2.17.1On Mon, Jun 13, 2022 at 7:43 AM Aswath Govindraju <a-govindraju@ti.com> wrote: > From: Devarsh Thakkar <devarsht@ti.com> > > Add support for system suspend/resume PM hooks, save the > register context of all the required gpio registers on suspend > and restore context on the resume. > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Hijacking thread! Aswath, if you are testing DaVinci boards can you look at these two patches: https://lore.kernel.org/linux-gpio/20220507124536.171930-1-linus.walleij@linaro.org/ https://lore.kernel.org/linux-gpio/20220507124536.171930-2-linus.walleij@linaro.org/ I resend them every new kernel release but they never get merged :D If you can test them, maybe I can queue them directly for the SoC tree. Yours, Linus Walleij
On Tue, Jun 28, 2022 at 3:52 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > On Mon, Jun 13, 2022 at 7:43 AM Aswath Govindraju <a-govindraju@ti.com> wrote: > > > From: Devarsh Thakkar <devarsht@ti.com> > > > > Add support for system suspend/resume PM hooks, save the > > register context of all the required gpio registers on suspend > > and restore context on the resume. > > > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > > Hijacking thread! > > Aswath, if you are testing DaVinci boards can you look at these two > patches: > https://lore.kernel.org/linux-gpio/20220507124536.171930-1-linus.walleij@linaro.org/ > https://lore.kernel.org/linux-gpio/20220507124536.171930-2-linus.walleij@linaro.org/ > > I resend them every new kernel release but they never get merged :D > > If you can test them, maybe I can queue them directly for the SoC > tree. Sekhar: do you still maintain DaVinci platforms? If so - could you take these patches through yourtree? Bart
On Fri, Jul 1, 2022 at 12:28 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: > > On Tue, Jun 28, 2022 at 3:52 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > > > On Mon, Jun 13, 2022 at 7:43 AM Aswath Govindraju <a-govindraju@ti.com> wrote: > > > > > From: Devarsh Thakkar <devarsht@ti.com> > > > > > > Add support for system suspend/resume PM hooks, save the > > > register context of all the required gpio registers on suspend > > > and restore context on the resume. > > > > > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > > > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > > > > Hijacking thread! > > > > Aswath, if you are testing DaVinci boards can you look at these two > > patches: > > https://lore.kernel.org/linux-gpio/20220507124536.171930-1-linus.walleij@linaro.org/ > > https://lore.kernel.org/linux-gpio/20220507124536.171930-2-linus.walleij@linaro.org/ > > > > I resend them every new kernel release but they never get merged :D > > > > If you can test them, maybe I can queue them directly for the SoC > > tree. > > Sekhar: do you still maintain DaVinci platforms? If so - could you > take these patches through yourtree? We concluded in parallell discussions that DM644x and DM646x are unused as far as we can tell so I just sent patches to delete these board files, that should do it. Yours, Linus Walleij
On Mon, Jun 13, 2022 at 7:43 AM Aswath Govindraju <a-govindraju@ti.com> wrote: > > From: Devarsh Thakkar <devarsht@ti.com> > > Add support for system suspend/resume PM hooks, save the > register context of all the required gpio registers on suspend > and restore context on the resume. > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > --- > Applied, thanks! Bart
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