Macronix mx66l2g45g is a 3V, 2Gbit (256MB) NOR flash that supports
x1, x2, and x4 operation modes.

Tested read/write/erase with Aspeed AST2600 BMC SoC operating in x2
mode at 50MHz, using Aspeed spi-mem driver.

Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
---
 drivers/mtd/spi-nor/macronix.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index d81a4cb2812b..fd24ce9f02e2 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -95,6 +95,8 @@ static const struct flash_info macronix_nor_parts[] = {
 	{ "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
 			      SPI_NOR_QUAD_READ) },
+	{ "mx66l2g45g",  INFO(0xc2201c, 0, 64 * 1024, 4096)
+		PARSE_SFDP },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048)
 		NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) },
 	{ "mx66u2g45g",	 INFO(0xc2253c, 0, 64 * 1024, 4096)
-- 
2.34.1

Use PARSE_SFDP for now as the SNOR_ID3() patch is not merged yet, will
switch to it after it is merged.

On 2022-05-23 22:30, Jiaqing Zhao wrote:
> Macronix mx66l2g45g is a 3V, 2Gbit (256MB) NOR flash that supports
> x1, x2, and x4 operation modes.
> 
> Tested read/write/erase with Aspeed AST2600 BMC SoC operating in x2
> mode at 50MHz, using Aspeed spi-mem driver.
> 
> Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
> ---
>  drivers/mtd/spi-nor/macronix.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> index d81a4cb2812b..fd24ce9f02e2 100644
> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -95,6 +95,8 @@ static const struct flash_info macronix_nor_parts[] = {
>  	{ "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048)
>  		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
>  			      SPI_NOR_QUAD_READ) },
> +	{ "mx66l2g45g",  INFO(0xc2201c, 0, 64 * 1024, 4096)
> +		PARSE_SFDP },
>  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048)
>  		NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) },
>  	{ "mx66u2g45g",	 INFO(0xc2253c, 0, 64 * 1024, 4096)

Am 2022-05-23 16:33, schrieb Jiaqing Zhao:
> Use PARSE_SFDP for now as the SNOR_ID3() patch is not merged yet, will
> switch to it after it is merged.

Fair enough, could you resubmit it with
{ "mx66l2g45g",  INFO(0xc2201c, 0, 0, 0) PARSE_SFDP },

Looks odd, but is the same as SNOR_ID3(0xc2201c), so we can just
switch to the new macro without any more testing. Or Pratyush can
replace it inline while committing this patch if the SNOR_ID3()
will make it in before.

-michael

On 2022-05-23 22:59, Michael Walle wrote:
> Am 2022-05-23 16:33, schrieb Jiaqing Zhao:
>> Use PARSE_SFDP for now as the SNOR_ID3() patch is not merged yet, will
>> switch to it after it is merged.
> 
> Fair enough, could you resubmit it with
> { "mx66l2g45g",  INFO(0xc2201c, 0, 0, 0) PARSE_SFDP },
> 
> Looks odd, but is the same as SNOR_ID3(0xc2201c), so we can just
> switch to the new macro without any more testing. Or Pratyush can
> replace it inline while committing this patch if the SNOR_ID3()
> will make it in before.

I'll add a TODO comment in case we forgot it.

> -michael