Update the pcie bindings to the correct dt bindings:
 pcie_phy:
  - use pcie0_refclk
  - add required clock-names
 pcie:
  - remove pcie_phy clock as it comes from phy driver

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2:
 - update commit log
 - add required clock-names to pcie_phy node
---
 arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index edf0c7aaaef0..7848509b3e2b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -595,7 +595,8 @@
 &pcie_phy {
 	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
 	fsl,clkreq-unsupported;
-	clocks = <&clk IMX8MM_CLK_DUMMY>;
+	clocks = <&pcie0_refclk>;
+	clock-names = "ref";
 	status = "okay";
 };
 
@@ -604,8 +605,8 @@
 	pinctrl-0 = <&pinctrl_pcie0>;
 	reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
 	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
-		 <&clk IMX8MM_CLK_DUMMY>, <&pcie0_refclk>;
-	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+		 <&pcie0_refclk>;
+	clock-names = "pcie", "pcie_aux", "pcie_bus";
 	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
 			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
 	assigned-clock-rates = <10000000>, <250000000>;
-- 
2.17.1

On Fri, Apr 29, 2022 at 09:13:47AM -0700, Tim Harvey wrote:
> Update the pcie bindings to the correct dt bindings:
>  pcie_phy:
>   - use pcie0_refclk
>   - add required clock-names
>  pcie:
>   - remove pcie_phy clock as it comes from phy driver
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Applied, thanks!

Hi Tim,

On Fri, Apr 29, 2022 at 1:13 PM Tim Harvey <tharvey@gateworks.com> wrote:
>
> Update the pcie bindings to the correct dt bindings:
>  pcie_phy:
>   - use pcie0_refclk
>   - add required clock-names
>  pcie:
>   - remove pcie_phy clock as it comes from phy driver
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>

It seems you missed the Fixes tag.

Reviewed-by: Fabio Estevam <festevam@gmail.com>

On Fri, Apr 29, 2022 at 9:18 AM Fabio Estevam <festevam@gmail.com> wrote:
>
> Hi Tim,
>
> On Fri, Apr 29, 2022 at 1:13 PM Tim Harvey <tharvey@gateworks.com> wrote:
> >
> > Update the pcie bindings to the correct dt bindings:
> >  pcie_phy:
> >   - use pcie0_refclk
> >   - add required clock-names
> >  pcie:
> >   - remove pcie_phy clock as it comes from phy driver
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>
> It seems you missed the Fixes tag.
>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>

Fabio,

it didn't really 'fix' anything but dt syntax. PCIe works without this patch.

Best Regards,

Tim