To support reset of infra, we add property of #reset-cells.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 411feb294613..66ff18344ac2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -269,6 +269,7 @@
compatible = "mediatek,mt8192-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <2>;
};
pericfg: syscon@10003000 {
--
2.18.0