From: "jason-jh.lin" <jason-jh.lin@mediatek.com>
Power:
1. Add description for power-domains property.
GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
reg:
maxItems: 1
+ power-domains:
+ description:
+ A phandle and PM domain specifier as defined by bindings
+ of the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ mboxes:
+ description:
+ Using mailbox to communicate with GCE, it should have this
+ property and list of phandle, mailbox specifiers. See
+ Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ mediatek,gce-client-reg:
+ description:
+ The register of client driver can be configured by gce with 4 arguments
+ defined in this property, such as phandle of gce, subsys id,
+ register offset and size.
+ Each subsys id is mapping to a base address of display function blocks
+ register which is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+
"#clock-cells":
const: 1
@@ -56,9 +80,16 @@ additionalProperties: false
examples:
- |
+ #include <dt-bindings/power/mt8173-power.h>
+ #include <dt-bindings/gce/mt8173-gce.h>
+
mmsys: syscon@14000000 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0x14000000 0x1000>;
+ power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+ <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
};
--
2.18.0
On Tue, Apr 19, 2022 at 11:32:33AM +0800, Rex-BC Chen wrote:
> From: "jason-jh.lin" <jason-jh.lin@mediatek.com>
>
> Power:
> 1. Add description for power-domains property.
>
> GCE:
> 1. Add description for mboxes property.
> 2. Add description for mediatek,gce-client-reg property.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index b31d90dc9eb4..6c2c3edcd443 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -41,6 +41,30 @@ properties:
> reg:
> maxItems: 1
>
> + power-domains:
How many and what are they.
> + description:
> + A phandle and PM domain specifier as defined by bindings
> + of the power controller specified by phandle. See
> + Documentation/devicetree/bindings/power/power-domain.yaml for details.
Drop. Don't need generic descriptions of common properties.
> +
> + mboxes:
How many?
> + description:
> + Using mailbox to communicate with GCE, it should have this
If using?
> + property and list of phandle, mailbox specifiers. See
> + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
Drop
> + $ref: /schemas/types.yaml#/definitions/phandle-array
Already has a type.
> +
> + mediatek,gce-client-reg:
> + description:
> + The register of client driver can be configured by gce with 4 arguments
> + defined in this property, such as phandle of gce, subsys id,
> + register offset and size.
> + Each subsys id is mapping to a base address of display function blocks
> + register which is defined in the gce header
> + include/dt-bindings/gce/<chip>-gce.h.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
This needs to define exact sizes.
items:
- items:
- description: phandle to GCE
- description: subsy id
- description: register offset
- description: register size
> +
> "#clock-cells":
> const: 1
>
> @@ -56,9 +80,16 @@ additionalProperties: false
>
> examples:
> - |
> + #include <dt-bindings/power/mt8173-power.h>
> + #include <dt-bindings/gce/mt8173-gce.h>
> +
> mmsys: syscon@14000000 {
> compatible = "mediatek,mt8173-mmsys", "syscon";
> reg = <0x14000000 0x1000>;
> + power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> + <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> };
> --
> 2.18.0
>
>
Hi Rob,
Thanks for the reviews.
Since this patch has already applied in:
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/commit/?h=v5.18-next/soc&id=1da90b8a7bae09358569dba26e784d1f471b4aa0
I'll send a fixup-patch for your commnet.
On Tue, 2022-04-26 at 13:31 -0500, Rob Herring wrote:
> On Tue, Apr 19, 2022 at 11:32:33AM +0800, Rex-BC Chen wrote:
> > From: "jason-jh.lin" <jason-jh.lin@mediatek.com>
> >
> > Power:
> > 1. Add description for power-domains property.
> >
> > GCE:
> > 1. Add description for mboxes property.
> > 2. Add description for mediatek,gce-client-reg property.
> >
> > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > Reviewed-by: CK Hu <ck.hu@mediatek.com>
> > ---
> > .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31
> > +++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > index b31d90dc9eb4..6c2c3edcd443 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > @@ -41,6 +41,30 @@ properties:
> > reg:
> > maxItems: 1
> >
> > + power-domains:
>
> How many and what are they.
>
maxItems: 1
description:
Each mmsys belongs to a power-domains, so we can add the power-
domains property to make it clearer, and also bind to the power
controller.
> > + description:
> > + A phandle and PM domain specifier as defined by bindings
> > + of the power controller specified by phandle. See
> > + Documentation/devicetree/bindings/power/power-domain.yaml
> > for details.
>
> Drop. Don't need generic descriptions of common properties.
>
OK, I'll drop this.
> > +
> > + mboxes:
>
> How many?
>
minItems: 1
> > + description:
> > + Using mailbox to communicate with GCE, it should have this
>
> If using?
>
description:
If using mailbox to communicate with GCE, it should have this
property. GCE will help configure the hardware settings for the
current mmsys data pipeline.
> > + property and list of phandle, mailbox specifiers. See
> > + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for
> > details.
>
> Drop
>
OK, I'll drop this.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
>
> Already has a type.
>
OK, I'll drop this.
> > +
> > + mediatek,gce-client-reg:
> > + description:
> > + The register of client driver can be configured by gce with
> > 4 arguments
> > + defined in this property, such as phandle of gce, subsys id,
> > + register offset and size.
> > + Each subsys id is mapping to a base address of display
> > function blocks
> > + register which is defined in the gce header
> > + include/dt-bindings/gce/<chip>-gce.h.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + maxItems: 1
>
> This needs to define exact sizes.
>
> items:
> - items:
> - description: phandle to GCE
> - description: subsy id
> - description: register offset
> - description: register size
>
OK, I'll fix it like this:
mediatek,gce-client-reg:
minItems: 1
items:
- items:
- description: phandle to GCE
- description: subsys id
- description: register offset
- description: register size
Regards,
Jason-JH.Lin
> > +
> > "#clock-cells":
> > const: 1
> >
> > @@ -56,9 +80,16 @@ additionalProperties: false
> >
> > examples:
> > - |
> > + #include <dt-bindings/power/mt8173-power.h>
> > + #include <dt-bindings/gce/mt8173-gce.h>
> > +
> > mmsys: syscon@14000000 {
> > compatible = "mediatek,mt8173-mmsys", "syscon";
> > reg = <0x14000000 0x1000>;
> > + power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> > #clock-cells = <1>;
> > #reset-cells = <1>;
> > + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> > + <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> > };
> > --
> > 2.18.0
> >
> >
--
Jason-JH Lin <jason-jh.lin@mediatek.com>
On 19/04/2022 05:32, Rex-BC Chen wrote:
> From: "jason-jh.lin" <jason-jh.lin@mediatek.com>
>
> Power:
> 1. Add description for power-domains property.
>
> GCE:
> 1. Add description for mboxes property.
> 2. Add description for mediatek,gce-client-reg property.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
Applied, thanks.
Matthias
> ---
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index b31d90dc9eb4..6c2c3edcd443 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -41,6 +41,30 @@ properties:
> reg:
> maxItems: 1
>
> + power-domains:
> + description:
> + A phandle and PM domain specifier as defined by bindings
> + of the power controller specified by phandle. See
> + Documentation/devicetree/bindings/power/power-domain.yaml for details.
> +
> + mboxes:
> + description:
> + Using mailbox to communicate with GCE, it should have this
> + property and list of phandle, mailbox specifiers. See
> + Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> + mediatek,gce-client-reg:
> + description:
> + The register of client driver can be configured by gce with 4 arguments
> + defined in this property, such as phandle of gce, subsys id,
> + register offset and size.
> + Each subsys id is mapping to a base address of display function blocks
> + register which is defined in the gce header
> + include/dt-bindings/gce/<chip>-gce.h.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> +
> "#clock-cells":
> const: 1
>
> @@ -56,9 +80,16 @@ additionalProperties: false
>
> examples:
> - |
> + #include <dt-bindings/power/mt8173-power.h>
> + #include <dt-bindings/gce/mt8173-gce.h>
> +
> mmsys: syscon@14000000 {
> compatible = "mediatek,mt8173-mmsys", "syscon";
> reg = <0x14000000 0x1000>;
> + power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> + <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> };
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