drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Hi all,
After merging the kspp tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/bitmap.h:9,
from include/linux/cpumask.h:12,
from arch/x86/include/asm/paravirt.h:17,
from arch/x86/include/asm/irqflags.h:63,
from include/linux/irqflags.h:16,
from include/linux/rcupdate.h:26,
from include/linux/rculist.h:11,
from include/linux/pid.h:5,
from include/linux/sched.h:14,
from include/linux/ratelimit.h:6,
from include/linux/dev_printk.h:16,
from include/linux/device.h:15,
from drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c:5:
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c: In function 'npcmgpio_irq_handler':
include/linux/find.h:40:23: error: array subscript 'long unsigned int[0]' is partly outside array bounds of 'u32[1]' {aka 'unsigned int[1]'} [-Werror=array-bounds]
40 | val = *addr & GENMASK(size - 1, offset);
| ^~~~~
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c:219:13: note: while referencing 'sts'
219 | u32 sts, en, bit;
| ^~~
Caused by commit
3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
probably exposed by commit
a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450")
from the pinctrl tree and enabling -Werror=array-bounds.
I have applied the following hack patch for today.
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Wed, 16 Mar 2022 18:12:14 +1100
Subject: [PATCH] fixup for "pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver"
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 41136f63014a..fddcb7d6bdf4 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -216,7 +216,8 @@ static void npcmgpio_irq_handler(struct irq_desc *desc)
struct gpio_chip *gc;
struct irq_chip *chip;
struct npcm7xx_gpio *bank;
- u32 sts, en, bit;
+ unsigned long sts, bit;
+ u32 en;
gc = irq_desc_get_handler_data(desc);
bank = gpiochip_get_data(gc);
@@ -225,7 +226,7 @@ static void npcmgpio_irq_handler(struct irq_desc *desc)
chained_irq_enter(chip, desc);
sts = ioread32(bank->base + NPCM7XX_GP_N_EVST);
en = ioread32(bank->base + NPCM7XX_GP_N_EVEN);
- dev_dbg(bank->gc.parent, "==> got irq sts %.8x %.8x\n", sts,
+ dev_dbg(bank->gc.parent, "==> got irq sts %.8lx %.8x\n", sts,
en);
sts &= en;
--
2.34.1
--
Cheers,
Stephen Rothwell
On Wed, Mar 16, 2022 at 8:32 AM Stephen Rothwell <sfr@canb.auug.org.au> wrote: > After merging the kspp tree, today's linux-next build (x86_64 > allmodconfig) failed like this: (...) > I have applied the following hack patch for today. > > From: Stephen Rothwell <sfr@canb.auug.org.au> > Date: Wed, 16 Mar 2022 18:12:14 +1100 > Subject: [PATCH] fixup for "pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver" Patch looks good but didn't apply to he pinctrl tree when I tried to simply apply it there. Since it is touching IRQ handlers, I suspect this could maybe apply to Marc Z:s or Bartosz trees? Or can you see which one needs this? Yours, Linus Walleij
On 2022-03-17 01:01, Linus Walleij wrote:
> On Wed, Mar 16, 2022 at 8:32 AM Stephen Rothwell <sfr@canb.auug.org.au>
> wrote:
>
>> After merging the kspp tree, today's linux-next build (x86_64
>> allmodconfig) failed like this:
> (...)
>> I have applied the following hack patch for today.
>>
>> From: Stephen Rothwell <sfr@canb.auug.org.au>
>> Date: Wed, 16 Mar 2022 18:12:14 +1100
>> Subject: [PATCH] fixup for "pinctrl: nuvoton: add NPCM7xx pinctrl and
>> GPIO driver"
>
> Patch looks good but didn't apply to he pinctrl tree when I
> tried to simply apply it there.
>
> Since it is touching IRQ handlers, I suspect this could maybe
> apply to Marc Z:s or Bartosz trees? Or can you see which one
> needs this?
Yes, I've now picked this up.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 1c3b5c62fc856e8ba71f071d1cf37b2d88411e8b
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/1c3b5c62fc856e8ba71f071d1cf37b2d88411e8b
Author: Stephen Rothwell <sfr@canb.auug.org.au>
AuthorDate: Wed, 16 Mar 2022 18:12:14 +11:00
Committer: Marc Zyngier <maz@kernel.org>
CommitterDate: Thu, 17 Mar 2022 08:20:39
pinctrl: npcm: Fix broken typing on 64bit platforms
The npcm driver confuses u32 and unsigned long, which works on
32bit platforms, but leads to disasters on 64bit systems (and
breaks the build if using -Werror=array-bounds).
Use proper typing to address the issue.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
[maz: commit message, additional changes suggested by Jonathan Neuschäfer]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220316183227.725bfd37@canb.auug.org.au
---
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index ba536fd..a9831da 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -216,7 +216,7 @@ static void npcmgpio_irq_handler(struct irq_desc *desc)
struct gpio_chip *gc;
struct irq_chip *chip;
struct npcm7xx_gpio *bank;
- u32 sts, en, bit;
+ unsigned long sts, bit, en;
gc = irq_desc_get_handler_data(desc);
bank = gpiochip_get_data(gc);
@@ -225,11 +225,11 @@ static void npcmgpio_irq_handler(struct irq_desc *desc)
chained_irq_enter(chip, desc);
sts = ioread32(bank->base + NPCM7XX_GP_N_EVST);
en = ioread32(bank->base + NPCM7XX_GP_N_EVEN);
- dev_dbg(bank->gc.parent, "==> got irq sts %.8x %.8x\n", sts,
+ dev_dbg(bank->gc.parent, "==> got irq sts %.8lx %.8lx\n", sts,
en);
sts &= en;
- for_each_set_bit(bit, (const void *)&sts, NPCM7XX_GPIO_PER_BANK)
+ for_each_set_bit(bit, &sts, NPCM7XX_GPIO_PER_BANK)
generic_handle_domain_irq(gc->irq.domain, bit);
chained_irq_exit(chip, desc);
}© 2016 - 2026 Red Hat, Inc.