drivers/remoteproc/mtk_common.h | 2 + drivers/remoteproc/mtk_scp.c | 67 +++++++++++++++++++++++++-------- 2 files changed, 53 insertions(+), 16 deletions(-)
The definition of L1TCM_SRAM_PDN bits on mt8195 is different to mt8192.
L1TCM_SRAM_PDN bits[3:0] control the power of mt8195 L1TCM SRAM.
L1TCM_SRAM_PDN bits[7:4] control the access path to EMI for SCP.
These bits have to be powered on to allow EMI access for SCP.
Bits[7:4] also affect audio DSP because audio DSP and SCP are
placed on the same hardware bus. If SCP cannot access EMI, audio DSP is
blocked too.
L1TCM_SRAM_PDN bits[31:8] are not used.
This fix removes modification of bits[7:4] when power on/off mt8195 SCP
L1TCM. It's because the modification introduces a short period of time
blocking audio DSP to access EMI. This was not a problem until we have
to load both SCP module and audio DSP module. audio DSP needs to access
EMI because it has source/data on DRAM. Audio DSP will have unexpected
behavior when it accesses EMI and the SCP driver blocks the EMI path at
the same time.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
drivers/remoteproc/mtk_common.h | 2 +
drivers/remoteproc/mtk_scp.c | 67 +++++++++++++++++++++++++--------
2 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h
index 5ff3867c72f3..ff954a06637c 100644
--- a/drivers/remoteproc/mtk_common.h
+++ b/drivers/remoteproc/mtk_common.h
@@ -51,6 +51,8 @@
#define MT8192_CORE0_WDT_IRQ 0x10030
#define MT8192_CORE0_WDT_CFG 0x10034
+#define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4)
+
#define SCP_FW_VER_LEN 32
#define SCP_SHARE_BUFFER_SIZE 288
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index dcddb33e9997..086cf8263f6c 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -365,22 +365,22 @@ static int mt8183_scp_before_load(struct mtk_scp *scp)
return 0;
}
-static void mt8192_power_on_sram(void __iomem *addr)
+static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask)
{
int i;
for (i = 31; i >= 0; i--)
- writel(GENMASK(i, 0), addr);
+ writel(GENMASK(i, 0) & ~reserved_mask, addr);
writel(0, addr);
}
-static void mt8192_power_off_sram(void __iomem *addr)
+static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
{
int i;
writel(0, addr);
for (i = 0; i < 32; i++)
- writel(GENMASK(i, 0), addr);
+ writel(GENMASK(i, 0) & ~reserved_mask, addr);
}
static int mt8192_scp_before_load(struct mtk_scp *scp)
@@ -391,11 +391,32 @@ static int mt8192_scp_before_load(struct mtk_scp *scp)
writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
/* enable SRAM clock */
- mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
- mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
- mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
- mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
- mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+
+ /* enable MPU for all memory regions */
+ writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
+
+ return 0;
+}
+
+static int mt8195_scp_before_load(struct mtk_scp *scp)
+{
+ /* clear SPM interrupt, SCP2SPM_IPC_CLR */
+ writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
+
+ writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
+
+ /* enable SRAM clock */
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
+ MT8195_L1TCM_SRAM_PDN_RESERVED_BITS);
+ scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* enable MPU for all memory regions */
writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
@@ -551,11 +572,25 @@ static void mt8183_scp_stop(struct mtk_scp *scp)
static void mt8192_scp_stop(struct mtk_scp *scp)
{
/* Disable SRAM clock */
- mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
- mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
- mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
- mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
- mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
+
+ /* Disable SCP watchdog */
+ writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
+}
+
+static void mt8195_scp_stop(struct mtk_scp *scp)
+{
+ /* Disable SRAM clock */
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
+ MT8195_L1TCM_SRAM_PDN_RESERVED_BITS);
+ scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* Disable SCP watchdog */
writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
@@ -888,11 +923,11 @@ static const struct mtk_scp_of_data mt8192_of_data = {
static const struct mtk_scp_of_data mt8195_of_data = {
.scp_clk_get = mt8195_scp_clk_get,
- .scp_before_load = mt8192_scp_before_load,
+ .scp_before_load = mt8195_scp_before_load,
.scp_irq_handler = mt8192_scp_irq_handler,
.scp_reset_assert = mt8192_scp_reset_assert,
.scp_reset_deassert = mt8192_scp_reset_deassert,
- .scp_stop = mt8192_scp_stop,
+ .scp_stop = mt8195_scp_stop,
.scp_da_to_va = mt8192_scp_da_to_va,
.host_to_scp_reg = MT8192_GIPC_IN_SET,
.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
--
2.18.0
Il 11/03/22 13:30, Tinghan Shen ha scritto: > The definition of L1TCM_SRAM_PDN bits on mt8195 is different to mt8192. > > L1TCM_SRAM_PDN bits[3:0] control the power of mt8195 L1TCM SRAM. > > L1TCM_SRAM_PDN bits[7:4] control the access path to EMI for SCP. > These bits have to be powered on to allow EMI access for SCP. > > Bits[7:4] also affect audio DSP because audio DSP and SCP are > placed on the same hardware bus. If SCP cannot access EMI, audio DSP is > blocked too. > > L1TCM_SRAM_PDN bits[31:8] are not used. > > This fix removes modification of bits[7:4] when power on/off mt8195 SCP > L1TCM. It's because the modification introduces a short period of time > blocking audio DSP to access EMI. This was not a problem until we have > to load both SCP module and audio DSP module. audio DSP needs to access > EMI because it has source/data on DRAM. Audio DSP will have unexpected > behavior when it accesses EMI and the SCP driver blocks the EMI path at > the same time. > > Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> > --- > drivers/remoteproc/mtk_common.h | 2 + > drivers/remoteproc/mtk_scp.c | 67 +++++++++++++++++++++++++-------- > 2 files changed, 53 insertions(+), 16 deletions(-) > > diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h > index 5ff3867c72f3..ff954a06637c 100644 > --- a/drivers/remoteproc/mtk_common.h > +++ b/drivers/remoteproc/mtk_common.h > @@ -51,6 +51,8 @@ > #define MT8192_CORE0_WDT_IRQ 0x10030 > #define MT8192_CORE0_WDT_CFG 0x10034 > > +#define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) > + > #define SCP_FW_VER_LEN 32 > #define SCP_SHARE_BUFFER_SIZE 288 > > diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c > index dcddb33e9997..086cf8263f6c 100644 > --- a/drivers/remoteproc/mtk_scp.c > +++ b/drivers/remoteproc/mtk_scp.c > @@ -365,22 +365,22 @@ static int mt8183_scp_before_load(struct mtk_scp *scp) > return 0; > } > > -static void mt8192_power_on_sram(void __iomem *addr) > +static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask) > { > int i; > > for (i = 31; i >= 0; i--) > - writel(GENMASK(i, 0), addr); > + writel(GENMASK(i, 0) & ~reserved_mask, addr); > writel(0, addr); > } > > -static void mt8192_power_off_sram(void __iomem *addr) > +static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask) > { > int i; > > writel(0, addr); > for (i = 0; i < 32; i++) > - writel(GENMASK(i, 0), addr); > + writel(GENMASK(i, 0) & ~reserved_mask, addr); > } > > static int mt8192_scp_before_load(struct mtk_scp *scp) > @@ -391,11 +391,32 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) > writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); > > /* enable SRAM clock */ > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); > - mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); > - mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); > + scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > + > + /* enable MPU for all memory regions */ > + writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); > + > + return 0; > +} > + > +static int mt8195_scp_before_load(struct mtk_scp *scp) > +{ > + /* clear SPM interrupt, SCP2SPM_IPC_CLR */ > + writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); > + > + writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); > + > + /* enable SRAM clock */ > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > + scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > + MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); This is supposed to be MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS. > + scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > /* enable MPU for all memory regions */ > writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); > @@ -551,11 +572,25 @@ static void mt8183_scp_stop(struct mtk_scp *scp) > static void mt8192_scp_stop(struct mtk_scp *scp) > { > /* Disable SRAM clock */ > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); > - mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); > - mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); > + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > + > + /* Disable SCP watchdog */ > + writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); > +} > + > +static void mt8195_scp_stop(struct mtk_scp *scp) > +{ > + /* Disable SRAM clock */ > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > + scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > + MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); same here. > + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > /* Disable SCP watchdog */ > writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); > @@ -888,11 +923,11 @@ static const struct mtk_scp_of_data mt8192_of_data = { > > static const struct mtk_scp_of_data mt8195_of_data = { > .scp_clk_get = mt8195_scp_clk_get, > - .scp_before_load = mt8192_scp_before_load, > + .scp_before_load = mt8195_scp_before_load, > .scp_irq_handler = mt8192_scp_irq_handler, > .scp_reset_assert = mt8192_scp_reset_assert, > .scp_reset_deassert = mt8192_scp_reset_deassert, > - .scp_stop = mt8192_scp_stop, > + .scp_stop = mt8195_scp_stop, > .scp_da_to_va = mt8192_scp_da_to_va, > .host_to_scp_reg = MT8192_GIPC_IN_SET, > .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
Hi Angelo, They will be fixed at next version. Thank you. Best regards, TingHan On Fri, 2022-03-11 at 14:05 +0100, AngeloGioacchino Del Regno wrote: > Il 11/03/22 13:30, Tinghan Shen ha scritto: > > The definition of L1TCM_SRAM_PDN bits on mt8195 is different to mt8192. > > > > L1TCM_SRAM_PDN bits[3:0] control the power of mt8195 L1TCM SRAM. > > > > L1TCM_SRAM_PDN bits[7:4] control the access path to EMI for SCP. > > These bits have to be powered on to allow EMI access for SCP. > > > > Bits[7:4] also affect audio DSP because audio DSP and SCP are > > placed on the same hardware bus. If SCP cannot access EMI, audio DSP is > > blocked too. > > > > L1TCM_SRAM_PDN bits[31:8] are not used. > > > > This fix removes modification of bits[7:4] when power on/off mt8195 SCP > > L1TCM. It's because the modification introduces a short period of time > > blocking audio DSP to access EMI. This was not a problem until we have > > to load both SCP module and audio DSP module. audio DSP needs to access > > EMI because it has source/data on DRAM. Audio DSP will have unexpected > > behavior when it accesses EMI and the SCP driver blocks the EMI path at > > the same time. > > > > Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> > > --- > > drivers/remoteproc/mtk_common.h | 2 + > > drivers/remoteproc/mtk_scp.c | 67 +++++++++++++++++++++++++-------- > > 2 files changed, 53 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h > > index 5ff3867c72f3..ff954a06637c 100644 > > --- a/drivers/remoteproc/mtk_common.h > > +++ b/drivers/remoteproc/mtk_common.h > > @@ -51,6 +51,8 @@ > > #define MT8192_CORE0_WDT_IRQ 0x10030 > > #define MT8192_CORE0_WDT_CFG 0x10034 > > > > +#define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) > > + > > #define SCP_FW_VER_LEN 32 > > #define SCP_SHARE_BUFFER_SIZE 288 > > > > diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c > > index dcddb33e9997..086cf8263f6c 100644 > > --- a/drivers/remoteproc/mtk_scp.c > > +++ b/drivers/remoteproc/mtk_scp.c > > @@ -365,22 +365,22 @@ static int mt8183_scp_before_load(struct mtk_scp *scp) > > return 0; > > } > > > > -static void mt8192_power_on_sram(void __iomem *addr) > > +static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask) > > { > > int i; > > > > for (i = 31; i >= 0; i--) > > - writel(GENMASK(i, 0), addr); > > + writel(GENMASK(i, 0) & ~reserved_mask, addr); > > writel(0, addr); > > } > > > > -static void mt8192_power_off_sram(void __iomem *addr) > > +static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask) > > { > > int i; > > > > writel(0, addr); > > for (i = 0; i < 32; i++) > > - writel(GENMASK(i, 0), addr); > > + writel(GENMASK(i, 0) & ~reserved_mask, addr); > > } > > > > static int mt8192_scp_before_load(struct mtk_scp *scp) > > @@ -391,11 +391,32 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) > > writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); > > > > /* enable SRAM clock */ > > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); > > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); > > - mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); > > - mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); > > - mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > + > > + /* enable MPU for all memory regions */ > > + writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); > > + > > + return 0; > > +} > > + > > +static int mt8195_scp_before_load(struct mtk_scp *scp) > > +{ > > + /* clear SPM interrupt, SCP2SPM_IPC_CLR */ > > + writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); > > + > > + writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); > > + > > + /* enable SRAM clock */ > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > > + scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > > + MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > > This is supposed to be MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS. > > > + scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > > > /* enable MPU for all memory regions */ > > writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); > > @@ -551,11 +572,25 @@ static void mt8183_scp_stop(struct mtk_scp *scp) > > static void mt8192_scp_stop(struct mtk_scp *scp) > > { > > /* Disable SRAM clock */ > > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); > > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); > > - mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); > > - mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); > > - mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > + > > + /* Disable SCP watchdog */ > > + writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); > > +} > > + > > +static void mt8195_scp_stop(struct mtk_scp *scp) > > +{ > > + /* Disable SRAM clock */ > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); > > + scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > > + MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > > same here. > > > + scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); > > > > /* Disable SCP watchdog */ > > writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); > > @@ -888,11 +923,11 @@ static const struct mtk_scp_of_data mt8192_of_data = { > > > > static const struct mtk_scp_of_data mt8195_of_data = { > > .scp_clk_get = mt8195_scp_clk_get, > > - .scp_before_load = mt8192_scp_before_load, > > + .scp_before_load = mt8195_scp_before_load, > > .scp_irq_handler = mt8192_scp_irq_handler, > > .scp_reset_assert = mt8192_scp_reset_assert, > > .scp_reset_deassert = mt8192_scp_reset_deassert, > > - .scp_stop = mt8192_scp_stop, > > + .scp_stop = mt8195_scp_stop, > > .scp_da_to_va = mt8192_scp_da_to_va, > > .host_to_scp_reg = MT8192_GIPC_IN_SET, > > .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, > >
Hi Tinghan, Thank you for the patch! Yet something to improve: [auto build test ERROR on remoteproc/rproc-next] [also build test ERROR on v5.17-rc7 next-20220310] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Tinghan-Shen/remoteproc-mediatek-fix-side-effect-of-mt8195-sram-power-on/20220311-203255 base: git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git rproc-next config: parisc-randconfig-r031-20220310 (https://download.01.org/0day-ci/archive/20220312/202203120056.qtDEVoye-lkp@intel.com/config) compiler: hppa-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/6d56ab3bae4e0d5e07d295169602883ba7d7de08 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Tinghan-Shen/remoteproc-mediatek-fix-side-effect-of-mt8195-sram-power-on/20220311-203255 git checkout 6d56ab3bae4e0d5e07d295169602883ba7d7de08 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=parisc SHELL=/bin/bash drivers/remoteproc/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/remoteproc/mtk_scp.c: In function 'mt8195_scp_before_load': >> drivers/remoteproc/mtk_scp.c:418:27: error: 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' undeclared (first use in this function); did you mean 'MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS'? 418 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS drivers/remoteproc/mtk_scp.c:418:27: note: each undeclared identifier is reported only once for each function it appears in drivers/remoteproc/mtk_scp.c: In function 'mt8195_scp_stop': drivers/remoteproc/mtk_scp.c:592:28: error: 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' undeclared (first use in this function); did you mean 'MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS'? 592 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS vim +418 drivers/remoteproc/mtk_scp.c 405 406 static int mt8195_scp_before_load(struct mtk_scp *scp) 407 { 408 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 409 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 410 411 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 412 413 /* enable SRAM clock */ 414 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 415 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 416 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 417 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > 418 MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); 419 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 420 421 /* enable MPU for all memory regions */ 422 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 423 424 return 0; 425 } 426 --- 0-DAY CI Kernel Test Service https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi Tinghan, > 418 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS > drivers/remoteproc/mtk_scp.c:418:27: note: each undeclared identifier is reported only once for each function it appears in > drivers/remoteproc/mtk_scp.c: In function 'mt8195_scp_stop': > drivers/remoteproc/mtk_scp.c:592:28: error: 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' undeclared (first use in this function); did you mean 'MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS'? > 592 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS I tested this patch and it can should be caught by the internal build test. Could you do the test before submitting patches out? Thanks, Miles
Hi Miles, On Sun, 2022-03-13 at 08:01 +0800, Miles Chen wrote: > Hi Tinghan, > > > 418 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS > > drivers/remoteproc/mtk_scp.c:418:27: note: each undeclared identifier is reported only once > > for each function it appears in > > drivers/remoteproc/mtk_scp.c: In function 'mt8195_scp_stop': > > drivers/remoteproc/mtk_scp.c:592:28: error: 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' undeclared > > (first use in this function); did you mean 'MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS'? > > 592 | MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); > > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > | MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS > > I tested this patch and it can should be caught by the > internal build test. > > Could you do the test before submitting patches out? > > > Thanks, > Miles I'm Sorry. I was too confident for this change. I'll do the test at next time. Thank you. Best regards, TingHan
Hi Tinghan, Thank you for the patch! Yet something to improve: [auto build test ERROR on remoteproc/rproc-next] [also build test ERROR on v5.17-rc7 next-20220310] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Tinghan-Shen/remoteproc-mediatek-fix-side-effect-of-mt8195-sram-power-on/20220311-203255 base: git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git rproc-next config: s390-buildonly-randconfig-r004-20220310 (https://download.01.org/0day-ci/archive/20220312/202203120744.6e2bnwRT-lkp@intel.com/config) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 276ca87382b8f16a65bddac700202924228982f6) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install s390 cross compiling tool for clang build # apt-get install binutils-s390x-linux-gnu # https://github.com/0day-ci/linux/commit/6d56ab3bae4e0d5e07d295169602883ba7d7de08 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Tinghan-Shen/remoteproc-mediatek-fix-side-effect-of-mt8195-sram-power-on/20220311-203255 git checkout 6d56ab3bae4e0d5e07d295169602883ba7d7de08 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=s390 SHELL=/bin/bash drivers/remoteproc/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from drivers/remoteproc/mtk_scp.c:7: In file included from include/linux/dma-mapping.h:10: In file included from include/linux/scatterlist.h:9: In file included from arch/s390/include/asm/io.h:75: include/asm-generic/io.h:464:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] val = __raw_readb(PCI_IOBASE + addr); ~~~~~~~~~~ ^ include/asm-generic/io.h:477:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr)); ~~~~~~~~~~ ^ include/uapi/linux/byteorder/big_endian.h:37:59: note: expanded from macro '__le16_to_cpu' #define __le16_to_cpu(x) __swab16((__force __u16)(__le16)(x)) ^ include/uapi/linux/swab.h:102:54: note: expanded from macro '__swab16' #define __swab16(x) (__u16)__builtin_bswap16((__u16)(x)) ^ In file included from drivers/remoteproc/mtk_scp.c:7: In file included from include/linux/dma-mapping.h:10: In file included from include/linux/scatterlist.h:9: In file included from arch/s390/include/asm/io.h:75: include/asm-generic/io.h:490:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr)); ~~~~~~~~~~ ^ include/uapi/linux/byteorder/big_endian.h:35:59: note: expanded from macro '__le32_to_cpu' #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x)) ^ include/uapi/linux/swab.h:115:54: note: expanded from macro '__swab32' #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x)) ^ In file included from drivers/remoteproc/mtk_scp.c:7: In file included from include/linux/dma-mapping.h:10: In file included from include/linux/scatterlist.h:9: In file included from arch/s390/include/asm/io.h:75: include/asm-generic/io.h:501:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] __raw_writeb(value, PCI_IOBASE + addr); ~~~~~~~~~~ ^ include/asm-generic/io.h:511:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr); ~~~~~~~~~~ ^ include/asm-generic/io.h:521:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr); ~~~~~~~~~~ ^ include/asm-generic/io.h:609:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] readsb(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ include/asm-generic/io.h:617:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] readsw(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ include/asm-generic/io.h:625:20: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] readsl(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ include/asm-generic/io.h:634:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] writesb(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ include/asm-generic/io.h:643:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] writesw(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ include/asm-generic/io.h:652:21: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] writesl(PCI_IOBASE + addr, buffer, count); ~~~~~~~~~~ ^ >> drivers/remoteproc/mtk_scp.c:418:6: error: use of undeclared identifier 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); ^ drivers/remoteproc/mtk_scp.c:592:7: error: use of undeclared identifier 'MT8195_L1TCM_SRAM_PDN_RESERVED_BITS' MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); ^ 12 warnings and 2 errors generated. vim +/MT8195_L1TCM_SRAM_PDN_RESERVED_BITS +418 drivers/remoteproc/mtk_scp.c 405 406 static int mt8195_scp_before_load(struct mtk_scp *scp) 407 { 408 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 409 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 410 411 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 412 413 /* enable SRAM clock */ 414 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 415 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 416 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 417 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, > 418 MT8195_L1TCM_SRAM_PDN_RESERVED_BITS); 419 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 420 421 /* enable MPU for all memory regions */ 422 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 423 424 return 0; 425 } 426 --- 0-DAY CI Kernel Test Service https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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