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[PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue

Chun-Jie Chen posted 1 patch 2 years, 6 months ago
There is a newer version of this series
drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue
Posted by Chun-Jie Chen 2 years, 6 months ago 
Power reset maybe generate unexpected signal. In order to avoid
the glitch issue, we need to enable isolation first to guarantee the
stable signal when power reset is triggered.

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
---
This patch is based on 5.17-rc1.
---
 drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index b762bc40f56b..0195f6c3396b 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -272,9 +272,9 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
 	clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
 
 	/* subsys power off */
-	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);
+	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);
 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);
 
-- 
2.18.0
Re: [PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue
Posted by Chen-Yu Tsai 2 years, 6 months ago 
On Thu, Mar 10, 2022 at 9:20 AM Chun-Jie Chen
<chun-jie.chen@mediatek.com> wrote:
>
> Power reset maybe generate unexpected signal. In order to avoid
> the glitch issue, we need to enable isolation first to guarantee the
> stable signal when power reset is triggered.
>
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> ---
> This patch is based on 5.17-rc1.
> ---
>  drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index b762bc40f56b..0195f6c3396b 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -272,9 +272,9 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
>         clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
>
>         /* subsys power off */
> -       regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>         regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
>         regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);
> +       regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>         regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);
>         regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);
>
> --
> 2.18.0
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue
Posted by Miles Chen 2 years, 6 months ago 
Hi Chun-Jie,

>Power reset maybe generate unexpected signal. In order to avoid
>the glitch issue, we need to enable isolation first to guarantee the
>stable signal when power reset is triggered.
>
>Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
>Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
>---
>This patch is based on 5.17-rc1.
>---
> drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
>index b762bc40f56b..0195f6c3396b 100644
>--- a/drivers/soc/mediatek/mtk-pm-domains.c
>+++ b/drivers/soc/mediatek/mtk-pm-domains.c
>@@ -272,9 +272,9 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
> 	clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
> 
> 	/* subsys power off */
>-	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
> 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
> 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);
>+	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
> 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);
> 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);
 
Does it mean that we have to do power off by:
regmap_set_bits(PWR_ISO_BIT)
regmap_clear_bits(PWR_RST_B_BIT )

and do power on by:
regmap_set_bits(PWR_RST_B_BIT)
regmap_clear_bits(PWR_ISO_BIT)

But scpsys_power_on() has the following sequence:
regmap_clear_bits(PWR_ISO_BIT)
regmap_set_bits(PWR_RST_B_BIT)

Thanks,
Miles
Re: [PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue
Posted by Chun-Jie Chen 2 years, 6 months ago 
On Thu, 2022-03-10 at 11:59 +0800, Miles Chen wrote:
> Hi Chun-Jie,
> 
> > Power reset maybe generate unexpected signal. In order to avoid
> > the glitch issue, we need to enable isolation first to guarantee
> > the
> > stable signal when power reset is triggered.
> > 
> > Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power
> > domains")
> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > ---
> > This patch is based on 5.17-rc1.
> > ---
> > drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.c
> > b/drivers/soc/mediatek/mtk-pm-domains.c
> > index b762bc40f56b..0195f6c3396b 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.c
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> > @@ -272,9 +272,9 @@ static int scpsys_power_off(struct
> > generic_pm_domain *genpd)
> > 	clk_bulk_disable_unprepare(pd->num_subsys_clks, pd-
> > >subsys_clks);
> > 
> > 	/* subsys power off */
> > -	regmap_clear_bits(scpsys->base, pd->data->ctl_offs,
> > PWR_RST_B_BIT);
> > 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
> > 	regmap_set_bits(scpsys->base, pd->data->ctl_offs,
> > PWR_CLK_DIS_BIT);
> > +	regmap_clear_bits(scpsys->base, pd->data->ctl_offs,
> > PWR_RST_B_BIT);
> > 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs,
> > PWR_ON_2ND_BIT);
> > 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs,
> > PWR_ON_BIT);
> 
>  
> Does it mean that we have to do power off by:
> regmap_set_bits(PWR_ISO_BIT)
> regmap_clear_bits(PWR_RST_B_BIT )
> 
> and do power on by:
> regmap_set_bits(PWR_RST_B_BIT)
> regmap_clear_bits(PWR_ISO_BIT)
> 
> But scpsys_power_on() has the following sequence:
> regmap_clear_bits(PWR_ISO_BIT)
> regmap_set_bits(PWR_RST_B_BIT)
> 
> Thanks,
> Miles

Hi Miles,

This control sequence is suggested by hardware designer,
and when PWR_RST_B from 0 -> 1, it will trigger to exit from reset
state to running state, if we still enable isolation then can't start
running normally, so we need to disable isolation first in power on
sequence.

Thanks!
Re: [PATCH v1] soc: mediatek: pm-domains: Fix the power glitch issue
Posted by Miles Chen 2 years, 6 months ago 
Hi Chun-Jie,

> Hi Miles,
> 
> This control sequence is suggested by hardware designer,
> and when PWR_RST_B from 0 -> 1, it will trigger to exit from reset
> state to running state, if we still enable isolation then can't start
> running normally, so we need to disable isolation first in power on
> sequence.
>

Thanks for your explanation.

Reviewed-by: Miles Chen <miles.chen@mediatek.com>

Thanks,
Miles

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