drivers/crypto/atmel-aes.c | 1 + drivers/crypto/atmel-sha.c | 1 + 2 files changed, 2 insertions(+)
This patch adds support for hardware version of AES and SHA IPs
available on lan966x SoC.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
---
v1 -> v2:
- Removed fallthrough line, as it is not required.
drivers/crypto/atmel-aes.c | 1 +
drivers/crypto/atmel-sha.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index fe0558403191..f72c6b3e4ad8 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c
@@ -2509,6 +2509,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd)
/* keep only major version number */
switch (dd->hw_version & 0xff0) {
+ case 0x700:
case 0x500:
dd->caps.has_dualbuff = 1;
dd->caps.has_cfb64 = 1;
diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
index 1b13f601fd95..d1628112dacc 100644
--- a/drivers/crypto/atmel-sha.c
+++ b/drivers/crypto/atmel-sha.c
@@ -2508,6 +2508,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
/* keep only major version number */
switch (dd->hw_version & 0xff0) {
+ case 0x700:
case 0x510:
dd->caps.has_dma = 1;
dd->caps.has_dualbuff = 1;
--
2.17.1
On 1/28/22 09:17, Kavyasree Kotagiri wrote:
> This patch adds support for hardware version of AES and SHA IPs
> available on lan966x SoC.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
tested with sama7g5 which has:
[ 0.891304] atmel_aes e1810000.aes: version: 0x702
[ 0.896042] atmel_sha e1814000.sha: version: 0x700
> ---
> v1 -> v2:
> - Removed fallthrough line, as it is not required.
>
> drivers/crypto/atmel-aes.c | 1 +
> drivers/crypto/atmel-sha.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
> index fe0558403191..f72c6b3e4ad8 100644
> --- a/drivers/crypto/atmel-aes.c
> +++ b/drivers/crypto/atmel-aes.c
> @@ -2509,6 +2509,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd)
>
> /* keep only major version number */
> switch (dd->hw_version & 0xff0) {
> + case 0x700:
> case 0x500:
> dd->caps.has_dualbuff = 1;
> dd->caps.has_cfb64 = 1;
> diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
> index 1b13f601fd95..d1628112dacc 100644
> --- a/drivers/crypto/atmel-sha.c
> +++ b/drivers/crypto/atmel-sha.c
> @@ -2508,6 +2508,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
>
> /* keep only major version number */
> switch (dd->hw_version & 0xff0) {
> + case 0x700:
> case 0x510:
> dd->caps.has_dma = 1;
> dd->caps.has_dualbuff = 1;
On Fri, Jan 28, 2022 at 12:47:55PM +0530, Kavyasree Kotagiri wrote: > This patch adds support for hardware version of AES and SHA IPs > available on lan966x SoC. > > Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> > --- > v1 -> v2: > - Removed fallthrough line, as it is not required. > > drivers/crypto/atmel-aes.c | 1 + > drivers/crypto/atmel-sha.c | 1 + > 2 files changed, 2 insertions(+) Patch applied. Thanks. -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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