drivers/crypto/atmel-aes.c | 2 ++ drivers/crypto/atmel-sha.c | 2 ++ 2 files changed, 4 insertions(+)
This patch adds support for hardware version of AES and SHA IPs
available on lan966x SoC.
Tested-by: Vradha Panchal <vradha.panchal@microchip.com>
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
---
drivers/crypto/atmel-aes.c | 2 ++
drivers/crypto/atmel-sha.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index fe0558403191..358f1092d890 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c
@@ -2509,6 +2509,8 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd)
/* keep only major version number */
switch (dd->hw_version & 0xff0) {
+ case 0x700:
+ fallthrough;
case 0x500:
dd->caps.has_dualbuff = 1;
dd->caps.has_cfb64 = 1;
diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
index 1b13f601fd95..6c7bb91c8cce 100644
--- a/drivers/crypto/atmel-sha.c
+++ b/drivers/crypto/atmel-sha.c
@@ -2508,6 +2508,8 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
/* keep only major version number */
switch (dd->hw_version & 0xff0) {
+ case 0x700:
+ fallthrough;
case 0x510:
dd->caps.has_dma = 1;
dd->caps.has_dualbuff = 1;
--
2.17.1
On 27/01/2022 13:34:08+0530, Kavyasree Kotagiri wrote:
> This patch adds support for hardware version of AES and SHA IPs
> available on lan966x SoC.
>
> Tested-by: Vradha Panchal <vradha.panchal@microchip.com>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
> drivers/crypto/atmel-aes.c | 2 ++
> drivers/crypto/atmel-sha.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
> index fe0558403191..358f1092d890 100644
> --- a/drivers/crypto/atmel-aes.c
> +++ b/drivers/crypto/atmel-aes.c
> @@ -2509,6 +2509,8 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd)
>
> /* keep only major version number */
> switch (dd->hw_version & 0xff0) {
> + case 0x700:
> + fallthrough;
I don't think fallthrough is needed in that case.
> case 0x500:
> dd->caps.has_dualbuff = 1;
> dd->caps.has_cfb64 = 1;
> diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
> index 1b13f601fd95..6c7bb91c8cce 100644
> --- a/drivers/crypto/atmel-sha.c
> +++ b/drivers/crypto/atmel-sha.c
> @@ -2508,6 +2508,8 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
>
> /* keep only major version number */
> switch (dd->hw_version & 0xff0) {
> + case 0x700:
> + fallthrough;
> case 0x510:
> dd->caps.has_dma = 1;
> dd->caps.has_dualbuff = 1;
> --
> 2.17.1
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Thu, Jan 27, 2022 at 01:34:08PM +0530, Kavyasree Kotagiri wrote: > This patch adds support for hardware version of AES and SHA IPs > available on lan966x SoC. > > Tested-by: Vradha Panchal <vradha.panchal@microchip.com> > Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> > --- > drivers/crypto/atmel-aes.c | 2 ++ > drivers/crypto/atmel-sha.c | 2 ++ > 2 files changed, 4 insertions(+) Patch applied. Thanks. -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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