[clocksource: timers/drivers/next] clocksource/drivers/mips-gic-timer: Simplify gic_next_event() for per-cpu timer

clocksource-bot for Benoît Monin posted 1 patch 1 day, 3 hours ago
drivers/clocksource/mips-gic-timer.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
[clocksource: timers/drivers/next] clocksource/drivers/mips-gic-timer: Simplify gic_next_event() for per-cpu timer
Posted by clocksource-bot for Benoît Monin 1 day, 3 hours ago
The following commit has been merged into the timers/drivers/next branch of clocksource:

Commit-ID:     a05997891e64b8e32733c0e062a062dcc3617a12
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux.git//a05997891e64b8e32733c0e062a062dcc3617a12
Author:        Benoît Monin <benoit.monin@bootlin.com>
AuthorDate:    Tue, 29 Sep 2026 14:14:11 +02:00
Committer:     Daniel Lezcano <daniel.lezcano@kernel.org>
CommitterDate: Fri, 02 Oct 2026 12:00:55 +02:00

clocksource/drivers/mips-gic-timer: Simplify gic_next_event() for per-cpu timer

The GIC clock event device is registered per CPU and is flagged with
CLOCK_EVT_FEAT_C3STOP. This guarantees that the set_next_event() callback
is always invoked on the CPU of the event.

Drop the code path configuring the compare register of another CPU as it
is never called and does not correctly handle the case of having multiple
clusters, and document this guarantee by adding the CLOCK_EVT_FEAT_PERCPU
flag to the clock event device features.

Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Link: https://patch.msgid.link/20260929-sync-gic-counters-v4-4-ec70c4b60434@bootlin.com
---
 drivers/clocksource/mips-gic-timer.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 1501c7d..cdaf4ba 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -52,18 +52,13 @@ static u64 notrace gic_read_count(void)
 
 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 {
-	int cpu = cpumask_first(evt->cpumask);
 	u64 cnt;
 	int res;
 
 	cnt = gic_read_count();
 	cnt += (u64)delta;
-	if (cpu == raw_smp_processor_id()) {
-		write_gic_vl_compare(cnt);
-	} else {
-		write_gic_vl_other(mips_cm_vp_id(cpu));
-		write_gic_vo_compare(cnt);
-	}
+	write_gic_vl_compare(cnt);
+
 	res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
 	return res;
 }
@@ -82,6 +77,7 @@ static void gic_clockevent_cpu_init(unsigned int cpu,
 {
 	cd->name		= "MIPS GIC";
 	cd->features		= CLOCK_EVT_FEAT_ONESHOT |
+				  CLOCK_EVT_FEAT_PERCPU |
 				  CLOCK_EVT_FEAT_C3STOP;
 
 	cd->rating		= 350;