[tip: x86/boot] x86/boot: Remove redundant "cc" clobber in memcmp() and document it

tip-bot2 for Mauricio Faria de Oliveira posted 1 patch 1 day, 7 hours ago
arch/x86/boot/string.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
[tip: x86/boot] x86/boot: Remove redundant "cc" clobber in memcmp() and document it
Posted by tip-bot2 for Mauricio Faria de Oliveira 1 day, 7 hours ago
The following commit has been merged into the x86/boot branch of tip:

Commit-ID:     94509668fccfa098e0a3d57e7093a9afd88aea9f
Gitweb:        https://git.kernel.org/tip/94509668fccfa098e0a3d57e7093a9afd88aea9f
Author:        Mauricio Faria de Oliveira <mfo@igalia.com>
AuthorDate:    Mon, 21 Sep 2026 22:36:32 -03:00
Committer:     Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Tue, 22 Sep 2026 18:22:38 -07:00

x86/boot: Remove redundant "cc" clobber in memcmp() and document it

The "cc" clobber remains recognized for source compatibility, but it has
no meaning anymore; it is automatically generated without condition-code
constraints:

  https://lore.kernel.org/all/57b0d188-b256-bde4-43e6-99dae4f59d60@suse.de

Comment out the redundant "cc" clobber for documentation purposes.

  [ bp: Massage commit message. ]

Fixes: a8c171c107c0 ("x86/boot: Add volatile, clobbers and zero-length test in memcmp()")
Reported-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Mauricio Faria de Oliveira <mfo@igalia.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://patch.msgid.link/20260921-pvh-kasan-inline-v10-1-08da47943d8e@igalia.com
---
 arch/x86/boot/string.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c
index 1632d40..e10260e 100644
--- a/arch/x86/boot/string.c
+++ b/arch/x86/boot/string.c
@@ -36,11 +36,15 @@ int memcmp(const void *s1, const void *s2, size_t len)
 	/*
 	 * Make sure ZF is properly set in the len==0 case because in it,
 	 * RCX==0 and the REPE; CMPSB won't get executed.
+	 *
+	 * The "cc" clobber has no meaning anymore, just source compatibility.
+	 * On x86 the flag status bits are automatically added to the clobber
+	 * set when there are no =@ccXY constraints. Keep it as documentation.
 	 */
 	asm volatile("test %3, %3\n\t"
 		     "repe cmpsb"
 		     : "=@ccnz" (diff), "+D" (s1), "+S" (s2), "+c" (len)
-		     : : "cc", "memory");
+		     : : /* "cc", */ "memory");
 	return diff;
 }