arch/x86/include/asm/segment.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
The following commit has been merged into the x86/cleanups branch of tip:
Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
Author: Uros Bizjak <ubizjak@gmail.com>
AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
Committer: Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
x86/segment: Use MOVL when reading segment registers
Use MOVL when reading segment registers to avoid 0x66 operand-size override
insn prefix. The segment value is always 16-bit and gets zero-extended to the
full 32-bit size.
Example:
4e4: 66 8c c0 mov %es,%ax
4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
4e4: 8c c0 mov %es,%eax
4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
Also, use the %k0 modifier which generates the SImode (signed integer)
register name for the target register.
[ bp: Extend and clarify commit message. ]
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Tested-by: Michael Kelley <mhklinux@outlook.com>
Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
---
arch/x86/include/asm/segment.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index f59ae71..9f5be2b 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
* Save a segment register away:
*/
#define savesegment(seg, value) \
- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
#endif /* !__ASSEMBLER__ */
#endif /* __KERNEL__ */On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
>The following commit has been merged into the x86/cleanups branch of tip:
>
>Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
>Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
>Author: Uros Bizjak <ubizjak@gmail.com>
>AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
>Committer: Borislav Petkov (AMD) <bp@alien8.de>
>CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
>
>x86/segment: Use MOVL when reading segment registers
>
>Use MOVL when reading segment registers to avoid 0x66 operand-size override
>insn prefix. The segment value is always 16-bit and gets zero-extended to the
>full 32-bit size.
>
>Example:
>
> 4e4: 66 8c c0 mov %es,%ax
> 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
>
> 4e4: 8c c0 mov %es,%eax
> 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
>
>Also, use the %k0 modifier which generates the SImode (signed integer)
>register name for the target register.
>
> [ bp: Extend and clarify commit message. ]
>
>Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
>Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
>Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
>Tested-by: Michael Kelley <mhklinux@outlook.com>
>Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
>---
> arch/x86/include/asm/segment.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
>index f59ae71..9f5be2b 100644
>--- a/arch/x86/include/asm/segment.h
>+++ b/arch/x86/include/asm/segment.h
>@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> * Save a segment register away:
> */
> #define savesegment(seg, value) \
>- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
>+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
>
> #endif /* !__ASSEMBLER__ */
> #endif /* __KERNEL__ */
>
Incidentally, why aren't we using =rm here? Segment moves support memory operands.
On Tue, Jan 20, 2026 at 1:38 PM H. Peter Anvin <hpa@zytor.com> wrote:
>
> On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> >The following commit has been merged into the x86/cleanups branch of tip:
> >
> >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Author: Uros Bizjak <ubizjak@gmail.com>
> >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> >
> >x86/segment: Use MOVL when reading segment registers
> >
> >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> >full 32-bit size.
> >
> >Example:
> >
> > 4e4: 66 8c c0 mov %es,%ax
> > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> > 4e4: 8c c0 mov %es,%eax
> > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> >Also, use the %k0 modifier which generates the SImode (signed integer)
> >register name for the target register.
> >
> > [ bp: Extend and clarify commit message. ]
> >
> >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> >Tested-by: Michael Kelley <mhklinux@outlook.com>
> >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> >---
> > arch/x86/include/asm/segment.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> >index f59ae71..9f5be2b 100644
> >--- a/arch/x86/include/asm/segment.h
> >+++ b/arch/x86/include/asm/segment.h
> >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > * Save a segment register away:
> > */
> > #define savesegment(seg, value) \
> >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> >
> > #endif /* !__ASSEMBLER__ */
> > #endif /* __KERNEL__ */
> >
>
> Incidentally, why aren't we using =rm here? Segment moves support memory operands.
Resurrecting an old thread.
We would like to always use MOVL to avoid 0x66 operand size override
prefix when reading to a register, but MOVL does not support memory
operands. MOVW is required in this case.
Also note that both GCC and clang have their own share of problems
with "=rm" output asm constraints. GCC mostly prefers register output
and clang prefers memory output.
So, due to the above reasons, the compilation results in unoptimal
code, e.g: current_save_fsgs() compiles to:
32333: 8c e0 mov %fs,%eax
32335: 66 89 82 0c 0c 00 00 mov %ax,0xc0c(%rdx)
3233c: 8c e8 mov %gs,%eax
3233e: 66 89 82 0e 0c 00 00 mov %ax,0xc0e(%rdx)
To solve the above issue, I'd like to propose a specialized
__savesegment() macro that would allow optimized save to a memory
location:
#define __savesegment(seg, loc) \
do { \
BUILD_BUG_ON(sizeof(loc) != 2); \
asm volatile("movw %%" #seg ",%0" : "=m" (loc)); \
} while (0)
so one can use this variant when the segment register is really saved
to a memory. The above code improves to:
32333: 8c a2 0c 0c 00 00 mov %fs,0xc0c(%rdx)
32339: 8c aa 0e 0c 00 00 mov %gs,0xc0e(%rdx)
Unfortunately, inline asm does not support alternative instructions
that would depend on output argument type (reg vs mem), so the
selection can not be automatic. But by having specialized macro, a
developer can use the variant that results in the most optimal code.
A prototype patch is attached to the message.
Uros.
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 0f4283dcd0c4..82cb692da116 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -347,8 +347,14 @@ static inline void __loadsegment_fs(unsigned short value)
/*
* Save a segment register away:
*/
-#define savesegment(seg, value) \
- asm volatile("movl %%" #seg ",%k0" : "=r" (value))
+#define savesegment(seg, var) \
+ asm volatile("movl %%" #seg ",%k0" : "=r" (var))
+
+#define __savesegment(seg, loc) \
+do { \
+ BUILD_BUG_ON(sizeof(loc) != 2); \
+ asm volatile("movw %%" #seg ",%0" : "=m" (loc)); \
+} while (0)
#endif /* !__ASSEMBLER__ */
#endif /* __KERNEL__ */
Note: I personally *hate* the savesegment() syntax. For one thing, I would
much rather see a more C-like syntax, even if that means making a bunch of
inline functions. Replacing the macro with something that is actually
type-safe would be a bloody good thing, too.
Something like:
/* Generates register operation */
static inline unsigned int ds(void)
{
unsigned int v;
asm volatile("mov %%ds,%0" : "=r" (v));
return v;
}
/* Generates memory operation */
static inline void save_ds(u16 *dst)
{
asm volatile("mov %%ds,%0" : "=m" (dst));
}
Generating those inlines can be macroized if we really feel the need to, of
course...
-hpa
On Thu, Mar 12, 2026 at 8:12 PM H. Peter Anvin <hpa@zytor.com> wrote:
>
> Note: I personally *hate* the savesegment() syntax. For one thing, I would
> much rather see a more C-like syntax, even if that means making a bunch of
> inline functions. Replacing the macro with something that is actually
> type-safe would be a bloody good thing, too.
>
> Something like:
>
> /* Generates register operation */
> static inline unsigned int ds(void)
> {
> unsigned int v;
> asm volatile("mov %%ds,%0" : "=r" (v));
> return v;
> }
Yes, this would be much better, but should be unsigned long, because
move from segment register zero-extends all the way to 64-bits:
static inline unsigned long read_ds(void)
{
unsigned long v;
asm volatile("mov %%ds,%k0" : "=r" (v));
return v;
}
Uros.
> /* Generates memory operation */
> static inline void save_ds(u16 *dst)
> {
> asm volatile("mov %%ds,%0" : "=m" (dst));
> }
>
> Generating those inlines can be macroized if we really feel the need to, of
> course...
>
> -hpa
>
On Thu, Mar 12, 2026 at 8:50 PM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Thu, Mar 12, 2026 at 8:12 PM H. Peter Anvin <hpa@zytor.com> wrote:
> >
> > Note: I personally *hate* the savesegment() syntax. For one thing, I would
> > much rather see a more C-like syntax, even if that means making a bunch of
> > inline functions. Replacing the macro with something that is actually
> > type-safe would be a bloody good thing, too.
> >
> > Something like:
> >
> > /* Generates register operation */
> > static inline unsigned int ds(void)
> > {
> > unsigned int v;
> > asm volatile("mov %%ds,%0" : "=r" (v));
> > return v;
> > }
>
> Yes, this would be much better, but should be unsigned long, because
> move from segment register zero-extends all the way to 64-bits:
>
> static inline unsigned long read_ds(void)
> {
> unsigned long v;
> asm volatile("mov %%ds,%k0" : "=r" (v));
> return v;
> }
Now implemented at [1].
[1] https://lore.kernel.org/lkml/20260312215916.258176-4-ubizjak@gmail.com/T/#u
Uros.
On 2026-03-12 02:30, Uros Bizjak wrote: > > We would like to always use MOVL to avoid 0x66 operand size override > prefix when reading to a register, but MOVL does not support memory > operands. MOVW is required in this case. > Just use "mov" without any suffix. GAS LISTING movseg.s page 1 1 .text 2 3 0000 8CD8 mov %ds,%eax 4 0002 668CD8 mov %ds,%ax 5 0005 8C1B mov %ds,(%rbx) -hpa
On Thu, Mar 12, 2026 at 7:55 PM H. Peter Anvin <hpa@zytor.com> wrote:
>
> On 2026-03-12 02:30, Uros Bizjak wrote:
> >
> > We would like to always use MOVL to avoid 0x66 operand size override
> > prefix when reading to a register, but MOVL does not support memory
> > operands. MOVW is required in this case.
> >
>
> Just use "mov" without any suffix.
>
> GAS LISTING movseg.s page 1
>
>
> 1 .text
> 2
> 3 0000 8CD8 mov %ds,%eax
> 4 0002 668CD8 mov %ds,%ax
> 5 0005 8C1B mov %ds,(%rbx)
True, but with a register operand we would prefer this (note %k modifier):
short foo (void)
{
short r;
asm ("mov %%ds, %k0" : "=r"(r));
return r;
}
to avoid 0x66 operand size prefix even for 16bit output registers.
Also, "mov %ds,%eax" will zero-extend to the output register all the
way to 64-bit width. When savesegment() is defined as:
+#define savesegment(seg, var) \
+ asm volatile("movl %%" #seg ",%k0" : "=r" (var))
it allows the following patch:
--cut here--
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 2ba5f166e58f..c7f98977663c 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -187,7 +187,6 @@ void set_personality_ia32(bool);
#define ELF_CORE_COPY_REGS(pr_reg, regs) \
do { \
- unsigned v; \
(pr_reg)[0] = (regs)->r15; \
(pr_reg)[1] = (regs)->r14; \
(pr_reg)[2] = (regs)->r13; \
@@ -211,10 +210,10 @@ do { \
(pr_reg)[20] = (regs)->ss; \
(pr_reg)[21] = x86_fsbase_read_cpu(); \
(pr_reg)[22] = x86_gsbase_read_cpu_inactive(); \
- asm("movl %%ds,%0" : "=r" (v)); (pr_reg)[23] = v; \
- asm("movl %%es,%0" : "=r" (v)); (pr_reg)[24] = v; \
- asm("movl %%fs,%0" : "=r" (v)); (pr_reg)[25] = v; \
- asm("movl %%gs,%0" : "=r" (v)); (pr_reg)[26] = v; \
+ savesegment(ds, (pr_reg)[23]); \
+ savesegment(es, (pr_reg)[24]); \
+ savesegment(fs, (pr_reg)[25]); \
+ savesegment(gs, (pr_reg)[26]); \
} while (0);
--cut here--
that results in:
mov $ds, %eax
mov %rax, <mem>
without intermediate uint32 -> uint64 zext instruction.
Unfortunately, it is not possible to use %k on memory output operands
(so, "=rm" is not allowed with %k). Although the modifier is nop with
-masm=att, it will error out the compilation with -masm=intel. where:
mov %ds, DWORD PTR mb[rip]
Also, we want to store to exactly 2-byte memory location:
+#define __savesegment(seg, loc) \
+do { \
+ BUILD_BUG_ON(sizeof(loc) != 2); \
+ asm volatile("movw %%" #seg ",%0" : "=m" (loc)); \
+} while (0)
This macro will allow direct seg register store in e.g.:
--cut here--
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 4c718f8adc59..84c8d7a047d6 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -197,8 +197,8 @@ int copy_thread(struct task_struct *p, const
struct kernel_clone_args *args)
p->thread.gsindex = current->thread.gsindex;
p->thread.gsbase = current->thread.gsbase;
- savesegment(es, p->thread.es);
- savesegment(ds, p->thread.ds);
+ __savesegment(es, p->thread.es);
+ __savesegment(ds, p->thread.ds);
if (p->mm && (clone_flags & (CLONE_VM | CLONE_VFORK)) == CLONE_VM)
set_bit(MM_CONTEXT_LOCK_LAM, &p->mm->context.flags);
--cut here--
Uros.
On 2026-03-12 02:30, Uros Bizjak wrote: > > so one can use this variant when the segment register is really saved > to a memory. The above code improves to: > > 32333: 8c a2 0c 0c 00 00 mov %fs,0xc0c(%rdx) > 32339: 8c aa 0e 0c 00 00 mov %gs,0xc0e(%rdx) > > Unfortunately, inline asm does not support alternative instructions > that would depend on output argument type (reg vs mem), so the > selection can not be automatic. But by having specialized macro, a > developer can use the variant that results in the most optimal code. > > A prototype patch is attached to the message. > On a more general note, there is a *really* ugly way to distinguish operand type on the gas side: .section ".rodata","a" .macro classify typevar:req argument:req \typevar = 0 .irpc char,\argument .ifeq .L_type .ifc \char,% \typevar = 1 /* Register */ .endif .ifc \char,( \typevar = 2 /* Memory */ .endif .ifc \char,$ \typevar = 3 /* Immediate */ .endif .endif .endr .ifne .L_type \typevar = 2 .endif .endm classify .L_type,%rax .ascii "Type = " .byte .L_type + 0x30 .asciz "\n" -hpa
On Wed, Jan 21, 2026 at 2:29 AM H. Peter Anvin <hpa@zytor.com> wrote:
>
> On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> >The following commit has been merged into the x86/cleanups branch of tip:
> >
> >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Author: Uros Bizjak <ubizjak@gmail.com>
> >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> >
> >x86/segment: Use MOVL when reading segment registers
> >
> >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> >full 32-bit size.
> >
> >Example:
> >
> > 4e4: 66 8c c0 mov %es,%ax
> > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> > 4e4: 8c c0 mov %es,%eax
> > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> >Also, use the %k0 modifier which generates the SImode (signed integer)
> >register name for the target register.
> >
> > [ bp: Extend and clarify commit message. ]
> >
> >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> >Tested-by: Michael Kelley <mhklinux@outlook.com>
> >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> >---
> > arch/x86/include/asm/segment.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> >index f59ae71..9f5be2b 100644
> >--- a/arch/x86/include/asm/segment.h
> >+++ b/arch/x86/include/asm/segment.h
> >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > * Save a segment register away:
> > */
> > #define savesegment(seg, value) \
> >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> >
> > #endif /* !__ASSEMBLER__ */
> > #endif /* __KERNEL__ */
> >
>
> Incidentally, why aren't we using =rm here? Segment moves support memory operands.
You would have to be really careful to only use short (16-bit)
variables, because it will not zero-extend with a memory operand.
On Wed, 21 Jan 2026 06:49:16 -0500
Brian Gerst <brgerst@gmail.com> wrote:
> On Wed, Jan 21, 2026 at 2:29 AM H. Peter Anvin <hpa@zytor.com> wrote:
> >
> > On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> > >The following commit has been merged into the x86/cleanups branch of tip:
> > >
> > >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > >Author: Uros Bizjak <ubizjak@gmail.com>
> > >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> > >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> > >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> > >
> > >x86/segment: Use MOVL when reading segment registers
> > >
> > >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> > >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> > >full 32-bit size.
> > >
> > >Example:
> > >
> > > 4e4: 66 8c c0 mov %es,%ax
> > > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > >
> > > 4e4: 8c c0 mov %es,%eax
> > > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > >
> > >Also, use the %k0 modifier which generates the SImode (signed integer)
> > >register name for the target register.
> > >
> > > [ bp: Extend and clarify commit message. ]
> > >
> > >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> > >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> > >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> > >Tested-by: Michael Kelley <mhklinux@outlook.com>
> > >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> > >---
> > > arch/x86/include/asm/segment.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> > >index f59ae71..9f5be2b 100644
> > >--- a/arch/x86/include/asm/segment.h
> > >+++ b/arch/x86/include/asm/segment.h
> > >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > > * Save a segment register away:
> > > */
> > > #define savesegment(seg, value) \
> > >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> > >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> > >
> > > #endif /* !__ASSEMBLER__ */
> > > #endif /* __KERNEL__ */
> > >
> >
> > Incidentally, why aren't we using =rm here? Segment moves support memory operands.
>
> You would have to be really careful to only use short (16-bit)
> variables, because it will not zero-extend with a memory operand.
>
It would be much safer to have something that returned the value
of the segment register (zero extended to 32 bits).
David
On Wed, Jan 21, 2026 at 5:06 PM David Laight
<david.laight.linux@gmail.com> wrote:
>
> On Wed, 21 Jan 2026 06:49:16 -0500
> Brian Gerst <brgerst@gmail.com> wrote:
>
> > On Wed, Jan 21, 2026 at 2:29 AM H. Peter Anvin <hpa@zytor.com> wrote:
> > >
> > > On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> > > >The following commit has been merged into the x86/cleanups branch of tip:
> > > >
> > > >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > > >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > > >Author: Uros Bizjak <ubizjak@gmail.com>
> > > >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> > > >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> > > >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> > > >
> > > >x86/segment: Use MOVL when reading segment registers
> > > >
> > > >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> > > >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> > > >full 32-bit size.
> > > >
> > > >Example:
> > > >
> > > > 4e4: 66 8c c0 mov %es,%ax
> > > > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > > >
> > > > 4e4: 8c c0 mov %es,%eax
> > > > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > > >
> > > >Also, use the %k0 modifier which generates the SImode (signed integer)
> > > >register name for the target register.
> > > >
> > > > [ bp: Extend and clarify commit message. ]
> > > >
> > > >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> > > >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> > > >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> > > >Tested-by: Michael Kelley <mhklinux@outlook.com>
> > > >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> > > >---
> > > > arch/x86/include/asm/segment.h | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> > > >index f59ae71..9f5be2b 100644
> > > >--- a/arch/x86/include/asm/segment.h
> > > >+++ b/arch/x86/include/asm/segment.h
> > > >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > > > * Save a segment register away:
> > > > */
> > > > #define savesegment(seg, value) \
> > > >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> > > >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> > > >
> > > > #endif /* !__ASSEMBLER__ */
> > > > #endif /* __KERNEL__ */
> > > >
> > >
> > > Incidentally, why aren't we using =rm here? Segment moves support memory operands.
> >
> > You would have to be really careful to only use short (16-bit)
> > variables, because it will not zero-extend with a memory operand.
> >
>
> It would be much safer to have something that returned the value
> of the segment register (zero extended to 32 bits).
movl from %seg to 32-bit register (as proposed in the patch)
zero-extends the value all the way to word size (64-bits on x86_64).
The proposed solution also handles memory operands, so:
--cut here--
unsigned int m;
void foo(void)
{
asm("mov %%gs,%k0" : "=r"(m));
}
--cut here--
compiles to optimal code:
0000000000000000 <foo>:
0: 8c e8 mov %gs,%eax
2: 89 05 00 00 00 00 mov %eax,0x0(%rip) # 8 <foo+0x8>
4: R_X86_64_PC32 m-0x4
8: c3 ret
Uros.
On Wed, 21 Jan 2026 17:16:53 +0100
Uros Bizjak <ubizjak@gmail.com> wrote:
> On Wed, Jan 21, 2026 at 5:06 PM David Laight
> <david.laight.linux@gmail.com> wrote:
> >
> > On Wed, 21 Jan 2026 06:49:16 -0500
> > Brian Gerst <brgerst@gmail.com> wrote:
> >
> > > On Wed, Jan 21, 2026 at 2:29 AM H. Peter Anvin <hpa@zytor.com> wrote:
> > > >
> > > > On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> > > > >The following commit has been merged into the x86/cleanups branch of tip:
> > > > >
> > > > >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > > > >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > > > >Author: Uros Bizjak <ubizjak@gmail.com>
> > > > >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> > > > >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> > > > >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> > > > >
> > > > >x86/segment: Use MOVL when reading segment registers
> > > > >
> > > > >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> > > > >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> > > > >full 32-bit size.
> > > > >
> > > > >Example:
> > > > >
> > > > > 4e4: 66 8c c0 mov %es,%ax
> > > > > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > > > >
> > > > > 4e4: 8c c0 mov %es,%eax
> > > > > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > > > >
> > > > >Also, use the %k0 modifier which generates the SImode (signed integer)
> > > > >register name for the target register.
> > > > >
> > > > > [ bp: Extend and clarify commit message. ]
> > > > >
> > > > >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> > > > >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> > > > >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> > > > >Tested-by: Michael Kelley <mhklinux@outlook.com>
> > > > >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> > > > >---
> > > > > arch/x86/include/asm/segment.h | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> > > > >index f59ae71..9f5be2b 100644
> > > > >--- a/arch/x86/include/asm/segment.h
> > > > >+++ b/arch/x86/include/asm/segment.h
> > > > >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > > > > * Save a segment register away:
> > > > > */
> > > > > #define savesegment(seg, value) \
> > > > >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> > > > >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> > > > >
> > > > > #endif /* !__ASSEMBLER__ */
> > > > > #endif /* __KERNEL__ */
> > > > >
> > > >
> > > > Incidentally, why aren't we using =rm here? Segment moves support memory operands.
> > >
> > > You would have to be really careful to only use short (16-bit)
> > > variables, because it will not zero-extend with a memory operand.
> > >
> >
> > It would be much safer to have something that returned the value
> > of the segment register (zero extended to 32 bits).
>
> movl from %seg to 32-bit register (as proposed in the patch)
> zero-extends the value all the way to word size (64-bits on x86_64).
> The proposed solution also handles memory operands, so:
>
> --cut here--
> unsigned int m;
>
> void foo(void)
> {
> asm("mov %%gs,%k0" : "=r"(m));
> }
> --cut here--
>
> compiles to optimal code:
>
> 0000000000000000 <foo>:
> 0: 8c e8 mov %gs,%eax
> 2: 89 05 00 00 00 00 mov %eax,0x0(%rip) # 8 <foo+0x8>
> 4: R_X86_64_PC32 m-0x4
> 8: c3 ret
>
> Uros.
As does this version:
unsigned int m;
#define get_seg(seg) ({ \
unsigned int _seg_val; \
asm("mov %%" #seg ",%k0" : "=r"(_seg_val)); \
_seg_val; \
})
void bar(void)
{
m = get_seg(gs);
}
bar:
movl %gs, %eax
movl %eax, m(%rip)
retq
Without the hidden lvalue.
David
On Tue, Jan 20, 2026 at 1:38 PM H. Peter Anvin <hpa@zytor.com> wrote:
>
> On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> >The following commit has been merged into the x86/cleanups branch of tip:
> >
> >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> >Author: Uros Bizjak <ubizjak@gmail.com>
> >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> >
> >x86/segment: Use MOVL when reading segment registers
> >
> >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> >full 32-bit size.
> >
> >Example:
> >
> > 4e4: 66 8c c0 mov %es,%ax
> > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> > 4e4: 8c c0 mov %es,%eax
> > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> >
> >Also, use the %k0 modifier which generates the SImode (signed integer)
> >register name for the target register.
> >
> > [ bp: Extend and clarify commit message. ]
> >
> >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> >Tested-by: Michael Kelley <mhklinux@outlook.com>
> >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> >---
> > arch/x86/include/asm/segment.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> >index f59ae71..9f5be2b 100644
> >--- a/arch/x86/include/asm/segment.h
> >+++ b/arch/x86/include/asm/segment.h
> >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > * Save a segment register away:
> > */
> > #define savesegment(seg, value) \
> >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> >
> > #endif /* !__ASSEMBLER__ */
> > #endif /* __KERNEL__ */
> >
>
> Incidentally, why aren't we using =rm here? Segment moves support memory operands.
I have tried it with "=rm", and there were no cases when memory output
applies. Also, it would need to use ASM_OUTPUT_RM to handle clang
issues with memory output alternatives.
Uros.
On Tue, Jan 20, 2026 at 2:47 PM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Tue, Jan 20, 2026 at 1:38 PM H. Peter Anvin <hpa@zytor.com> wrote:
> >
> > On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak <tip-bot2@linutronix.de> wrote:
> > >The following commit has been merged into the x86/cleanups branch of tip:
> > >
> > >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b0004fbbfefe77956
> > >Author: Uros Bizjak <ubizjak@gmail.com>
> > >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00
> > >Committer: Borislav Petkov (AMD) <bp@alien8.de>
> > >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00
> > >
> > >x86/segment: Use MOVL when reading segment registers
> > >
> > >Use MOVL when reading segment registers to avoid 0x66 operand-size override
> > >insn prefix. The segment value is always 16-bit and gets zero-extended to the
> > >full 32-bit size.
> > >
> > >Example:
> > >
> > > 4e4: 66 8c c0 mov %es,%ax
> > > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > >
> > > 4e4: 8c c0 mov %es,%eax
> > > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx)
> > >
> > >Also, use the %k0 modifier which generates the SImode (signed integer)
> > >register name for the target register.
> > >
> > > [ bp: Extend and clarify commit message. ]
> > >
> > >Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> > >Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> > >Reviewed-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> > >Tested-by: Michael Kelley <mhklinux@outlook.com>
> > >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail.com
> > >---
> > > arch/x86/include/asm/segment.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
> > >index f59ae71..9f5be2b 100644
> > >--- a/arch/x86/include/asm/segment.h
> > >+++ b/arch/x86/include/asm/segment.h
> > >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned short value)
> > > * Save a segment register away:
> > > */
> > > #define savesegment(seg, value) \
> > >- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> > >+ asm("movl %%" #seg ",%k0" : "=r" (value) : : "memory")
> > >
> > > #endif /* !__ASSEMBLER__ */
> > > #endif /* __KERNEL__ */
> > >
> >
> > Incidentally, why aren't we using =rm here? Segment moves support memory operands.
>
> I have tried it with "=rm", and there were no cases when memory output
> applies. Also, it would need to use ASM_OUTPUT_RM to handle clang
> issues with memory output alternatives.
Also, savesegment() is defined as a macro, so e.g.:
--cut here--
#define savesegment(seg, value) \
asm("mov %%" #seg ",%0":"=rm" (value) : : "memory")
char c;
void foo (void)
{
savesegment (gs, c);
}
--cut here--
would result in a wrong code, where word sized 16-bit value is moved
to the location of "c".
Uros.
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