drivers/pci/controller/dwc/pcie-designware-host.c | 33 +++++++++++--- 1 file changed, 28 insertions(+), 5 deletions(-)
The following commit has been merged into the irq/msi branch of tip:
Commit-ID: eaf290c404f7c39f23292e9ce83b8b5b51ab598a
Gitweb: https://git.kernel.org/tip/eaf290c404f7c39f23292e9ce83b8b5b51ab598a
Author: Radu Rendec <rrendec@redhat.com>
AuthorDate: Fri, 28 Nov 2025 16:20:55 -05:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Mon, 15 Dec 2025 22:30:48 +01:00
PCI: dwc: Enable MSI affinity support
Leverage the interrupt redirection infrastructure to enable CPU affinity
support for MSI interrupts. Since the parent interrupt affinity cannot
be changed, affinity control for the child interrupt (MSI) is achieved
by redirecting the handler to run in IRQ work context on the target CPU.
This patch was originally prepared by Thomas Gleixner (see Link tag below)
in a patch series that was never submitted as is, and only parts of that
series have made it upstream so far.
Originally-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Radu Rendec <rrendec@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/
Link: https://patch.msgid.link/20251128212055.1409093-4-rrendec@redhat.com
---
drivers/pci/controller/dwc/pcie-designware-host.c | 33 +++++++++++---
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 25ad1ae..f116591 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -26,9 +26,27 @@ static struct pci_ops dw_pcie_ops;
static struct pci_ops dw_pcie_ecam_ops;
static struct pci_ops dw_child_pcie_ops;
+#ifdef CONFIG_SMP
+static void dw_irq_noop(struct irq_data *d) { }
+#endif
+
+static bool dw_pcie_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
+ struct irq_domain *real_parent, struct msi_domain_info *info)
+{
+ if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info))
+ return false;
+
+#ifdef CONFIG_SMP
+ info->chip->irq_ack = dw_irq_noop;
+ info->chip->irq_pre_redirect = irq_chip_pre_redirect_parent;
+#else
+ info->chip->irq_ack = irq_chip_ack_parent;
+#endif
+ return true;
+}
+
#define DW_PCIE_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
MSI_FLAG_USE_DEF_CHIP_OPS | \
- MSI_FLAG_NO_AFFINITY | \
MSI_FLAG_PCI_MSI_MASK_PARENT)
#define DW_PCIE_MSI_FLAGS_SUPPORTED (MSI_FLAG_MULTI_PCI_MSI | \
MSI_FLAG_PCI_MSIX | \
@@ -40,9 +58,8 @@ static const struct msi_parent_ops dw_pcie_msi_parent_ops = {
.required_flags = DW_PCIE_MSI_FLAGS_REQUIRED,
.supported_flags = DW_PCIE_MSI_FLAGS_SUPPORTED,
.bus_select_token = DOMAIN_BUS_PCI_MSI,
- .chip_flags = MSI_CHIP_FLAG_SET_ACK,
.prefix = "DW-",
- .init_dev_msi_info = msi_lib_init_dev_msi_info,
+ .init_dev_msi_info = dw_pcie_init_dev_msi_info,
};
/* MSI int handler */
@@ -63,7 +80,7 @@ void dw_handle_msi_irq(struct dw_pcie_rp *pp)
continue;
for_each_set_bit(pos, &status, MAX_MSI_IRQS_PER_CTRL)
- generic_handle_domain_irq(pp->irq_domain, irq_off + pos);
+ generic_handle_demux_domain_irq(pp->irq_domain, irq_off + pos);
}
}
@@ -140,10 +157,16 @@ static void dw_pci_bottom_ack(struct irq_data *d)
static struct irq_chip dw_pci_msi_bottom_irq_chip = {
.name = "DWPCI-MSI",
- .irq_ack = dw_pci_bottom_ack,
.irq_compose_msi_msg = dw_pci_setup_msi_msg,
.irq_mask = dw_pci_bottom_mask,
.irq_unmask = dw_pci_bottom_unmask,
+#ifdef CONFIG_SMP
+ .irq_ack = dw_irq_noop,
+ .irq_pre_redirect = dw_pci_bottom_ack,
+ .irq_set_affinity = irq_chip_redirect_set_affinity,
+#else
+ .irq_ack = dw_pci_bottom_ack,
+#endif
};
static int dw_pcie_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,Hi Radu, On 15/12/2025 21:34, tip-bot2 for Radu Rendec wrote: > The following commit has been merged into the irq/msi branch of tip: > > Commit-ID: eaf290c404f7c39f23292e9ce83b8b5b51ab598a > Gitweb: https://git.kernel.org/tip/eaf290c404f7c39f23292e9ce83b8b5b51ab598a > Author: Radu Rendec <rrendec@redhat.com> > AuthorDate: Fri, 28 Nov 2025 16:20:55 -05:00 > Committer: Thomas Gleixner <tglx@linutronix.de> > CommitterDate: Mon, 15 Dec 2025 22:30:48 +01:00 > > PCI: dwc: Enable MSI affinity support > > Leverage the interrupt redirection infrastructure to enable CPU affinity > support for MSI interrupts. Since the parent interrupt affinity cannot > be changed, affinity control for the child interrupt (MSI) is achieved > by redirecting the handler to run in IRQ work context on the target CPU. > > This patch was originally prepared by Thomas Gleixner (see Link tag below) > in a patch series that was never submitted as is, and only parts of that > series have made it upstream so far. > > Originally-by: Thomas Gleixner <tglx@linutronix.de> > Signed-off-by: Radu Rendec <rrendec@redhat.com> > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > Link: https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/ > Link: https://patch.msgid.link/20251128212055.1409093-4-rrendec@redhat.com With next-20260105 I am observing the following warning on the Tegra194 Jetson AGX platform ... WARNING KERN genirq: irq_chip DW-PCI-MSI-0001:01:00.0 did not update eff. affinity mask of irq 171 Bisect is point to this commit. This platform is using the driver drivers/pci/controller/dwc/pcie-tegra194.c. Is there some default affinity that we should be setting to avoid this warning? Thanks Jon -- nvpublic
Hi Jon, On Tue, 2026-01-06 at 09:53 +0000, Jon Hunter wrote: > On 15/12/2025 21:34, tip-bot2 for Radu Rendec wrote: > > The following commit has been merged into the irq/msi branch of tip: > > > > Commit-ID: eaf290c404f7c39f23292e9ce83b8b5b51ab598a > > Gitweb: https://git.kernel.org/tip/eaf290c404f7c39f23292e9ce83b8b5b51ab598a > > Author: Radu Rendec <rrendec@redhat.com> > > AuthorDate: Fri, 28 Nov 2025 16:20:55 -05:00 > > Committer: Thomas Gleixner <tglx@linutronix.de> > > CommitterDate: Mon, 15 Dec 2025 22:30:48 +01:00 > > > > PCI: dwc: Enable MSI affinity support > > > > Leverage the interrupt redirection infrastructure to enable CPU affinity > > support for MSI interrupts. Since the parent interrupt affinity cannot > > be changed, affinity control for the child interrupt (MSI) is achieved > > by redirecting the handler to run in IRQ work context on the target CPU. > > > > This patch was originally prepared by Thomas Gleixner (see Link tag below) > > in a patch series that was never submitted as is, and only parts of that > > series have made it upstream so far. > > > > Originally-by: Thomas Gleixner <tglx@linutronix.de> > > Signed-off-by: Radu Rendec <rrendec@redhat.com> > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > > Link: https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/ > > Link: https://patch.msgid.link/20251128212055.1409093-4-rrendec@redhat.com > > > With next-20260105 I am observing the following warning on the Tegra194 > Jetson AGX platform ... > > WARNING KERN genirq: irq_chip DW-PCI-MSI-0001:01:00.0 did not update > eff. affinity mask of irq 171 > > Bisect is point to this commit. This platform is using the driver > drivers/pci/controller/dwc/pcie-tegra194.c. Is there some default > affinity that we should be setting to avoid this warning? Before that patch, affinity control wasn't even possible for PCI MSIs exposed by the dw_pci drivers. Without having looked at the code yet, I suspect it's just because now that affinity control is enabled, something tries to use it. I don't think you should set some default affinity. By default, the PCI MSIs should be affine to all available CPUs, and that warning shouldn't happen in the first place. Let me test on Jetson AGX and see what's going on. I'll update the thread with my findings, hopefully later today. -- Thanks, Radu
Hi Jon,
On Tue, 2026-01-06 at 10:07 -0500, Radu Rendec wrote:
> On Tue, 2026-01-06 at 09:53 +0000, Jon Hunter wrote:
> > On 15/12/2025 21:34, tip-bot2 for Radu Rendec wrote:
> > > The following commit has been merged into the irq/msi branch of tip:
> > >
> > > Commit-ID: eaf290c404f7c39f23292e9ce83b8b5b51ab598a
> > > Gitweb: https://git.kernel.org/tip/eaf290c404f7c39f23292e9ce83b8b5b51ab598a
> > > Author: Radu Rendec <rrendec@redhat.com>
> > > AuthorDate: Fri, 28 Nov 2025 16:20:55 -05:00
> > > Committer: Thomas Gleixner <tglx@linutronix.de>
> > > CommitterDate: Mon, 15 Dec 2025 22:30:48 +01:00
> > >
> > > PCI: dwc: Enable MSI affinity support
> > >
> > > Leverage the interrupt redirection infrastructure to enable CPU affinity
> > > support for MSI interrupts. Since the parent interrupt affinity cannot
> > > be changed, affinity control for the child interrupt (MSI) is achieved
> > > by redirecting the handler to run in IRQ work context on the target CPU.
> > >
> > > This patch was originally prepared by Thomas Gleixner (see Link tag below)
> > > in a patch series that was never submitted as is, and only parts of that
> > > series have made it upstream so far.
> > >
> > > Originally-by: Thomas Gleixner <tglx@linutronix.de>
> > > Signed-off-by: Radu Rendec <rrendec@redhat.com>
> > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> > > Link: https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/
> > > Link: https://patch.msgid.link/20251128212055.1409093-4-rrendec@redhat.com
> >
> >
> > With next-20260105 I am observing the following warning on the Tegra194
> > Jetson AGX platform ...
> >
> > WARNING KERN genirq: irq_chip DW-PCI-MSI-0001:01:00.0 did not update
> > eff. affinity mask of irq 171
> >
> > Bisect is point to this commit. This platform is using the driver
> > drivers/pci/controller/dwc/pcie-tegra194.c. Is there some default
> > affinity that we should be setting to avoid this warning?
>
> Before that patch, affinity control wasn't even possible for PCI MSIs
> exposed by the dw_pci drivers. Without having looked at the code yet,
> I suspect it's just because now that affinity control is enabled,
> something tries to use it.
>
> I don't think you should set some default affinity. By default, the PCI
> MSIs should be affine to all available CPUs, and that warning shouldn't
> happen in the first place. Let me test on Jetson AGX and see what's
> going on. I'll update the thread with my findings, hopefully later
> today.
I looked at the code and tested, and the problem is that the effective
affinity mask is not updated for interrupt redirection. The bug is not
in this patch, but the previous one in the series [1], which adds the
interrupt redirection framework.
The warning is actually triggered when the MSI is set up. This is the
top part of the relevant stack trace:
irq_do_set_affinity+0x28c/0x300 (P)
irq_setup_affinity+0x130/0x208
irq_startup+0x118/0x170
__setup_irq+0x5b0/0x6a0
request_threaded_irq+0xb8/0x180
devm_request_threaded_irq+0x88/0x150
rtw_pci_probe+0x1e8/0x370 [rtw88_pci]
I don't immediately see an easy way to fix it for the generic case
because the affinity of the demultiplexing IRQ (the "parent" IRQ) can
change after the affinity of the demultiplexed IRQ (the "child" IRQ)
has been set up. But since dw_pcie is currently the only user of the
interrupt redirection infrastructure, and it sets up the demultiplexing
IRQ as a chained IRQ, there is no way its affinity can change other
than CPU hot(un)plug. And in this particular case, something as simple
as will work:
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index d5c3f6ee24cc2..036641f9534ae 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -1512,8 +1512,11 @@ EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
int irq_chip_redirect_set_affinity(struct irq_data *data, const struct cpumask *dest, bool force)
{
struct irq_redirect *redir = &irq_data_to_desc(data)->redirect;
+ unsigned int target_cpu = cpumask_first(dest);
+
+ WRITE_ONCE(redir->target_cpu, target_cpu);
+ irq_data_update_effective_affinity(data, cpumask_of(target_cpu));
- WRITE_ONCE(redir->target_cpu, cpumask_first(dest));
return IRQ_SET_MASK_OK;
}
EXPORT_SYMBOL_GPL(irq_chip_redirect_set_affinity);
I will send this as a proper patch tomorrow, and it will fix the
immediate problem and buy some time for a more elaborate fix for the
generic case. Meanwhile, thanks a lot for finding/reporting this!
[1] https://lore.kernel.org/all/20251128212055.1409093-2-rrendec@redhat.com/
--
Best regards,
Radu
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