On 07/09/2025 12:39, Tariq Toukan wrote:
> Hi,
>
> This small series by Dragos covers gaps requested in the initial pcie
> congestion series [1]:
> - Make pcie congestion thresholds configurable via devlink.
> - Add a counter for stale pcie congestion events.
>
> Regards,
> Tariq
>
> [1] https://lore.kernel.org/all/1752130292-22249-1-git-send-email-tariqt@nvidia.com/
>
> Dragos Tatulea (2):
> net/mlx5e: Make PCIe congestion event thresholds configurable
> net/mlx5e: Add stale counter for PCIe congestion events
>
> .../ethernet/mellanox/mlx5/counters.rst | 7 +-
> Documentation/networking/devlink/mlx5.rst | 52 +++++++++
> .../net/ethernet/mellanox/mlx5/core/devlink.c | 106 ++++++++++++++++++
> .../net/ethernet/mellanox/mlx5/core/devlink.h | 4 +
> .../mellanox/mlx5/core/en/pcie_cong_event.c | 79 +++++++++++--
> 5 files changed, 238 insertions(+), 10 deletions(-)
>
>
> base-commit: c6142e1913de563ab772f7b0e4ae78d6de9cc5b1
This has some trivial devlink conflicts with the other inflight series:
https://lore.kernel.org/all/20250907012953.301746-1-saeed@kernel.org/
Submitted in parallel as no real features dependency or order.
We'll help in resolution if this gets relevant (i.e. in case current
version of both series are accepted as-is).