The following commit has been merged into the x86/merge branch of tip:

Commit-ID:     c9d8ea9d53d4ddb80f2ad2bca5b9e9e40fcb9b16
Gitweb:        https://git.kernel.org/tip/c9d8ea9d53d4ddb80f2ad2bca5b9e9e40fcb9b16
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Fri, 02 May 2025 10:08:42 +02:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Fri, 02 May 2025 10:11:17 +02:00

x86/msr: Rename DECLARE_ARGS() to EAX_EDX_DECLARE_ARGS

DECLARE_ARGS() is way too generic of a name that says very little about
why these args are declared in that fashion - use the EAX_EDX_ prefix
to create a common prefix between the three helper methods:

	EAX_EDX_DECLARE_ARGS()
	EAX_EDX_VAL()
	EAX_EDX_RET()

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Uros Bizjak <ubizjak@gmail.com>
Cc: linux-kernel@vger.kernel.org
---
 arch/x86/include/asm/msr.h     | 14 +++++++-------
 arch/x86/kernel/cpu/mce/core.c |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 27bc0b5..d57a94c 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -46,11 +46,11 @@ struct saved_msrs {
  * clearing the high half of 'low':
  */
 #ifdef CONFIG_X86_64
-# define DECLARE_ARGS(val, low, high)	unsigned long low, high
+# define EAX_EDX_DECLARE_ARGS(val, low, high)	unsigned long low, high
 # define EAX_EDX_VAL(val, low, high)		((low) | (high) << 32)
 # define EAX_EDX_RET(val, low, high)		"=a" (low), "=d" (high)
 #else
-# define DECLARE_ARGS(val, low, high)	u64 val
+# define EAX_EDX_DECLARE_ARGS(val, low, high)	u64 val
 # define EAX_EDX_VAL(val, low, high)		(val)
 # define EAX_EDX_RET(val, low, high)		"=A" (val)
 #endif
@@ -83,7 +83,7 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
  */
 static __always_inline u64 __rdmsr(u32 msr)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	asm volatile("1: rdmsr\n"
 		     "2:\n"
@@ -129,7 +129,7 @@ static inline u64 native_read_msr(u32 msr)
 
 static inline u64 native_read_msr_safe(u32 msr, int *err)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
 		     "2:\n\t"
@@ -182,7 +182,7 @@ extern int wrmsr_safe_regs(u32 regs[8]);
  */
 static __always_inline u64 rdtsc(void)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
 
@@ -199,7 +199,7 @@ static __always_inline u64 rdtsc(void)
  */
 static __always_inline u64 rdtsc_ordered(void)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	/*
 	 * The RDTSC instruction is not ordered relative to memory
@@ -227,7 +227,7 @@ static __always_inline u64 rdtsc_ordered(void)
 
 static inline u64 native_read_pmc(int counter)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
 	if (tracepoint_enabled(rdpmc))
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 255927f..7b9908c 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -390,7 +390,7 @@ void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)
 /* MSR access wrappers used for error injection */
 noinstr u64 mce_rdmsrq(u32 msr)
 {
-	DECLARE_ARGS(val, low, high);
+	EAX_EDX_DECLARE_ARGS(val, low, high);
 
 	if (__this_cpu_read(injectm.finished)) {
 		int offset;