This patchset adds emaclite clock support. AXI Ethernet Lite IP can also
be used on SoC platforms like Zynq UltraScale+ MPSoC which combines
powerful processing system (PS) and user-programmable logic (PL) into
the same device. On these platforms it is mandatory to explicitly enable
IP clocks for proper functionality.
Changes for v3:
- Add Conor's ack to 1/3 patch.
- Remove braces around dev_err_probe().
Changes for v2:
- Make clocks as required property.
Abin Joseph (3):
dt-bindings: net: emaclite: Add clock support
net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev()
net: emaclite: Adopt clock support
.../bindings/net/xlnx,emaclite.yaml | 5 +++++
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 21 ++++++++++---------
2 files changed, 16 insertions(+), 10 deletions(-)
base-commit: 6607c17c6c5e029da03a90085db22daf518232bf
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2.34.1