The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 34b3fc558b537bdf99644dcde539e151716f6331
Gitweb: https://git.kernel.org/tip/34b3fc558b537bdf99644dcde539e151716f6331
Author: Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed, 29 May 2024 19:36:05 +01:00
Committer: Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Sat, 29 Jun 2024 16:10:37 +02:00
x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines
The outer if () should have been dropped when switching to c->x86_vfm.
Fixes: 6568fc18c2f6 ("x86/cpu/intel: Switch to new Intel CPU model defines")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240529183605.17520-1-andrew.cooper3@citrix.com
---
arch/x86/kernel/cpu/intel.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index a813089..a9ea0db 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -294,17 +294,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
}
/* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
- if (c->x86 == 6) {
- switch (c->x86_vfm) {
- case INTEL_ATOM_SALTWELL_MID:
- case INTEL_ATOM_SALTWELL_TABLET:
- case INTEL_ATOM_SILVERMONT_MID:
- case INTEL_ATOM_AIRMONT_NP:
- set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
- break;
- default:
- break;
- }
+ switch (c->x86_vfm) {
+ case INTEL_ATOM_SALTWELL_MID:
+ case INTEL_ATOM_SALTWELL_TABLET:
+ case INTEL_ATOM_SILVERMONT_MID:
+ case INTEL_ATOM_AIRMONT_NP:
+ set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
+ break;
}
/*