The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
---
Documentation/virt/kvm/api.rst | 1 +
arch/powerpc/include/uapi/asm/kvm.h | 1 +
arch/powerpc/kvm/book3s_hv.c | 6 ++++++
tools/arch/powerpc/include/uapi/asm/kvm.h | 1 +
4 files changed, 9 insertions(+)
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 81077c654281..0c22cb4196d8 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -2439,6 +2439,7 @@ registers, find a list below:
PPC KVM_REG_PPC_PSSCR 64
PPC KVM_REG_PPC_DEC_EXPIRY 64
PPC KVM_REG_PPC_PTCR 64
+ PPC KVM_REG_PPC_HASHKEYR 64
PPC KVM_REG_PPC_DAWR1 64
PPC KVM_REG_PPC_DAWRX1 64
PPC KVM_REG_PPC_DEXCR 64
diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h
index fcb947f65667..23a0af739c78 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
#define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
+#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 1294c6839d37..ccc9564c5a31 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2352,6 +2352,9 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_DEXCR:
*val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu));
break;
+ case KVM_REG_PPC_HASHKEYR:
+ *val = get_reg_val(id, kvmppc_get_hashkeyr_hv(vcpu));
+ break;
case KVM_REG_PPC_CIABR:
*val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu));
break;
@@ -2598,6 +2601,9 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_DEXCR:
kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val));
break;
+ case KVM_REG_PPC_HASHKEYR:
+ kvmppc_set_hashkeyr_hv(vcpu, set_reg_val(id, *val));
+ break;
case KVM_REG_PPC_CIABR:
kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val));
/* Don't allow setting breakpoints in hypervisor code */
diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h
index fcb947f65667..23a0af739c78 100644
--- a/tools/arch/powerpc/include/uapi/asm/kvm.h
+++ b/tools/arch/powerpc/include/uapi/asm/kvm.h
@@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
#define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
+#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRsOn Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote: > The patch adds a one-reg register identifier which can be used to > read and set the virtual HASHKEYR for the guest during enter/exit > with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation > too updated. > > Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> > --- > Documentation/virt/kvm/api.rst | 1 + > arch/powerpc/include/uapi/asm/kvm.h | 1 + > arch/powerpc/kvm/book3s_hv.c | 6 ++++++ > tools/arch/powerpc/include/uapi/asm/kvm.h | 1 + > 4 files changed, 9 insertions(+) > > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst > index 81077c654281..0c22cb4196d8 100644 > --- a/Documentation/virt/kvm/api.rst > +++ b/Documentation/virt/kvm/api.rst > @@ -2439,6 +2439,7 @@ registers, find a list below: > PPC KVM_REG_PPC_PSSCR 64 > PPC KVM_REG_PPC_DEC_EXPIRY 64 > PPC KVM_REG_PPC_PTCR 64 > + PPC KVM_REG_PPC_HASHKEYR 64 Just looking at the QEMU side of this change made me think... AFAIKS we need to also set and get and migrate the HASHPKEY SPR. The hashst/hashchk test cases might be "working" by chance if the SPR is always zero :/ Thanks, Nick
On 6/4/24 11:37, Nicholas Piggin wrote: > On Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote: >> The patch adds a one-reg register identifier which can be used to >> read and set the virtual HASHKEYR for the guest during enter/exit >> with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation >> too updated. >> >> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> >> --- >> Documentation/virt/kvm/api.rst | 1 + >> arch/powerpc/include/uapi/asm/kvm.h | 1 + >> arch/powerpc/kvm/book3s_hv.c | 6 ++++++ >> tools/arch/powerpc/include/uapi/asm/kvm.h | 1 + >> 4 files changed, 9 insertions(+) >> >> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst >> index 81077c654281..0c22cb4196d8 100644 >> --- a/Documentation/virt/kvm/api.rst >> +++ b/Documentation/virt/kvm/api.rst >> @@ -2439,6 +2439,7 @@ registers, find a list below: >> PPC KVM_REG_PPC_PSSCR 64 >> PPC KVM_REG_PPC_DEC_EXPIRY 64 >> PPC KVM_REG_PPC_PTCR 64 >> + PPC KVM_REG_PPC_HASHKEYR 64 > Just looking at the QEMU side of this change made me think... AFAIKS > we need to also set and get and migrate the HASHPKEY SPR. Thanks Nick. I have posted the v2 with changes for HASHPKEYR and your other suggestions at 171759276071.1480.9356137231993600304.stgit@linux.ibm.com Regards, Shivaprasad > > The hashst/hashchk test cases might be "working" by chance if the SPR > is always zero :/ > > Thanks, > Nick
On Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote:
> The patch adds a one-reg register identifier which can be used to
> read and set the virtual HASHKEYR for the guest during enter/exit
> with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
> too updated.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
>
> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
> ---
> Documentation/virt/kvm/api.rst | 1 +
> arch/powerpc/include/uapi/asm/kvm.h | 1 +
> arch/powerpc/kvm/book3s_hv.c | 6 ++++++
> tools/arch/powerpc/include/uapi/asm/kvm.h | 1 +
> 4 files changed, 9 insertions(+)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 81077c654281..0c22cb4196d8 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -2439,6 +2439,7 @@ registers, find a list below:
> PPC KVM_REG_PPC_PSSCR 64
> PPC KVM_REG_PPC_DEC_EXPIRY 64
> PPC KVM_REG_PPC_PTCR 64
> + PPC KVM_REG_PPC_HASHKEYR 64
> PPC KVM_REG_PPC_DAWR1 64
> PPC KVM_REG_PPC_DAWRX1 64
> PPC KVM_REG_PPC_DEXCR 64
> diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h
> index fcb947f65667..23a0af739c78 100644
> --- a/arch/powerpc/include/uapi/asm/kvm.h
> +++ b/arch/powerpc/include/uapi/asm/kvm.h
> @@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char {
> #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
> #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
> #define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
> +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7)
>
> /* Transactional Memory checkpointed state:
> * This is all GPRs, all VSX regs and a subset of SPRs
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 1294c6839d37..ccc9564c5a31 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -2352,6 +2352,9 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
> case KVM_REG_PPC_DEXCR:
> *val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu));
> break;
> + case KVM_REG_PPC_HASHKEYR:
> + *val = get_reg_val(id, kvmppc_get_hashkeyr_hv(vcpu));
> + break;
> case KVM_REG_PPC_CIABR:
> *val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu));
> break;
> @@ -2598,6 +2601,9 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
> case KVM_REG_PPC_DEXCR:
> kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val));
> break;
> + case KVM_REG_PPC_HASHKEYR:
> + kvmppc_set_hashkeyr_hv(vcpu, set_reg_val(id, *val));
> + break;
> case KVM_REG_PPC_CIABR:
> kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val));
> /* Don't allow setting breakpoints in hypervisor code */
> diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h
> index fcb947f65667..23a0af739c78 100644
> --- a/tools/arch/powerpc/include/uapi/asm/kvm.h
> +++ b/tools/arch/powerpc/include/uapi/asm/kvm.h
> @@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char {
> #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4)
> #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5)
> #define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6)
> +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7)
>
> /* Transactional Memory checkpointed state:
> * This is all GPRs, all VSX regs and a subset of SPRs
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