[tip: x86/irq] x86/irq: Reserve a per CPU IDT vector for posted MSIs

tip-bot2 for Jacob Pan posted 1 patch 1 year, 7 months ago
arch/x86/include/asm/irq_vectors.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
[tip: x86/irq] x86/irq: Reserve a per CPU IDT vector for posted MSIs
Posted by tip-bot2 for Jacob Pan 1 year, 7 months ago
The following commit has been merged into the x86/irq branch of tip:

Commit-ID:     f5a3562ec9dd29e61735ccf098d8ba05cf6c7c72
Gitweb:        https://git.kernel.org/tip/f5a3562ec9dd29e61735ccf098d8ba05cf6c7c72
Author:        Jacob Pan <jacob.jun.pan@linux.intel.com>
AuthorDate:    Tue, 23 Apr 2024 10:41:07 -07:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 30 Apr 2024 00:54:42 +02:00

x86/irq: Reserve a per CPU IDT vector for posted MSIs

When posted MSI is enabled, all device MSIs are multiplexed into a single
notification vector. MSI handlers will be de-multiplexed at run-time by
system software without IDT delivery.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240423174114.526704-6-jacob.jun.pan@linux.intel.com


---
 arch/x86/include/asm/irq_vectors.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index d18bfb2..13aea8f 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -97,10 +97,16 @@
 
 #define LOCAL_TIMER_VECTOR		0xec
 
+/*
+ * Posted interrupt notification vector for all device MSIs delivered to
+ * the host kernel.
+ */
+#define POSTED_MSI_NOTIFICATION_VECTOR	0xeb
+
 #define NR_VECTORS			 256
 
 #ifdef CONFIG_X86_LOCAL_APIC
-#define FIRST_SYSTEM_VECTOR		LOCAL_TIMER_VECTOR
+#define FIRST_SYSTEM_VECTOR		POSTED_MSI_NOTIFICATION_VECTOR
 #else
 #define FIRST_SYSTEM_VECTOR		NR_VECTORS
 #endif