On 22/12/2022 10:42, Srinivasa Rao Mandadapu wrote:
> Add CGCR register reset property for both RX and TX soundwire
> slave devices.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
> ---
> This patch depends on:
> -- https://lore.kernel.org/linux-clk/1671618061-6329-1-git-send-email-quic_srivasam@quicinc.com/
>
> .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index a750f05..ce5d69e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -217,3 +217,12 @@
> };
> };
> };
> +
> +&swr0 {
> + resets = <&lpasscc LPASS_AUDIO_SWR_RX_CGCR>;
> +};
> +
> +&swr1 {
Why here not in SoC DTSI?
> + resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
> +};
> +
Are you adding stray new lines?
Best regards,
Krzysztof