.../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++ 1 file changed, 247 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
This series add six metricgroups for neoverse-n2, among which, the
formula of topdown L1 is from the document:
https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
Since neoverse-n2 does not yet support topdown L2, metricgroups such
as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to
help further analysis of performance bottlenecks.
with this series on neoverse-n2:
$./perf list metricgroup
List of pre-defined events (to be used in -e):
Metric Groups:
Branch
Cache
InstructionMix
PEutilization
TLB
TopDownL1
$./perf list
...
Metric Groups:
Branch:
branch_miss_pred_rate
[The rate of branches mis-predited to the overall branches]
branch_mpki
[The rate of branches mis-predicted per kilo instructions]
branch_pki
[The rate of branches retired per kilo instructions]
Cache:
l1d_cache_miss_rate
[The rate of L1 D-Cache misses to the overall L1 D-Cache]
l1d_cache_mpki
[The rate of L1 D-Cache misses per kilo instructions]
...
$sudo ./perf stat -a -M TLB sleep 1
Performance counter stats for 'system wide':
35,861,936 L1I_TLB # 0.00 itlb_walk_rate (74.91%)
5,661 ITLB_WALK (74.91%)
97,279,240 INST_RETIRED # 0.07 itlb_mpki (74.91%)
6,851 ITLB_WALK (74.91%)
26,391 DTLB_WALK # 0.00 dtlb_walk_rate (75.07%)
35,585,545 L1D_TLB (75.07%)
85,923,244 INST_RETIRED # 0.35 dtlb_mpki (75.11%)
29,992 DTLB_WALK (75.11%)
1.003450755 seconds time elapsed
Jing Zhang (6):
perf vendor events arm64: Add topdown L1 metrics for neoverse-n2
perf vendor events arm64: Add TLB metrics for neoverse-n2
perf vendor events arm64: Add cache metrics for neoverse-n2
perf vendor events arm64: Add branch metrics for neoverse-n2
perf vendor events arm64: Add PE utilization metrics for neoverse-n2
perf vendor events arm64: Add instruction mix metrics for neoverse-n2
.../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++
1 file changed, 247 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
--
1.8.3.1
On 31/10/2022 11:11, Jing Zhang wrote: > This series add six metricgroups for neoverse-n2, among which, the > formula of topdown L1 is from the document: > https://documentation-service.arm.com/static/60250c7395978b529036da86?token= > > Since neoverse-n2 does not yet support topdown L2, metricgroups such > as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to > help further analysis of performance bottlenecks. > Hi Jing, Thanks for working on this, these metrics look ok to me in general, although we're currently working on publishing standardised metrics across all new cores as part of a new project in Arm. This will include N2, and our ones are very similar (or almost identical) to yours, barring slightly different group names, metric names, and differences in things like outputting topdown metrics as percentages. We plan to publish our standard metrics some time in the next 2 months. Would you consider holding off on merging this change so that we have consistant group names and units going forward? Otherwise N2 would be the odd one out. I will send you the metrics when they are ready, and we will have a script to generate perf jsons from them, so you can review. We also have a slightly different forumula for one of the top down metrics which I think would be slightly more accurate. We don't have anything for your "PE utilization" metrics, which I can raise internally. It could always be added to perf on top of the standardised ones if we don't add it to our standard ones. Thanks James > with this series on neoverse-n2: > > $./perf list metricgroup > > List of pre-defined events (to be used in -e): > > > Metric Groups: > > Branch > Cache > InstructionMix > PEutilization > TLB > TopDownL1 > > > $./perf list > > ... > Metric Groups: > > Branch: > branch_miss_pred_rate > [The rate of branches mis-predited to the overall branches] > branch_mpki > [The rate of branches mis-predicted per kilo instructions] > branch_pki > [The rate of branches retired per kilo instructions] > Cache: > l1d_cache_miss_rate > [The rate of L1 D-Cache misses to the overall L1 D-Cache] > l1d_cache_mpki > [The rate of L1 D-Cache misses per kilo instructions] > ... > > > $sudo ./perf stat -a -M TLB sleep 1 > > Performance counter stats for 'system wide': > > 35,861,936 L1I_TLB # 0.00 itlb_walk_rate (74.91%) > 5,661 ITLB_WALK (74.91%) > 97,279,240 INST_RETIRED # 0.07 itlb_mpki (74.91%) > 6,851 ITLB_WALK (74.91%) > 26,391 DTLB_WALK # 0.00 dtlb_walk_rate (75.07%) > 35,585,545 L1D_TLB (75.07%) > 85,923,244 INST_RETIRED # 0.35 dtlb_mpki (75.11%) > 29,992 DTLB_WALK (75.11%) > > 1.003450755 seconds time elapsed > > > Jing Zhang (6): > perf vendor events arm64: Add topdown L1 metrics for neoverse-n2 > perf vendor events arm64: Add TLB metrics for neoverse-n2 > perf vendor events arm64: Add cache metrics for neoverse-n2 > perf vendor events arm64: Add branch metrics for neoverse-n2 > perf vendor events arm64: Add PE utilization metrics for neoverse-n2 > perf vendor events arm64: Add instruction mix metrics for neoverse-n2 > > .../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++ > 1 file changed, 247 insertions(+) > create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json >
在 2022/11/16 下午7:19, James Clark 写道: > > > On 31/10/2022 11:11, Jing Zhang wrote: >> This series add six metricgroups for neoverse-n2, among which, the >> formula of topdown L1 is from the document: >> https://documentation-service.arm.com/static/60250c7395978b529036da86?token= >> >> Since neoverse-n2 does not yet support topdown L2, metricgroups such >> as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to >> help further analysis of performance bottlenecks. >> > > Hi Jing, > > Thanks for working on this, these metrics look ok to me in general, > although we're currently working on publishing standardised metrics > across all new cores as part of a new project in Arm. This will include > N2, and our ones are very similar (or almost identical) to yours, > barring slightly different group names, metric names, and differences in > things like outputting topdown metrics as percentages. > > We plan to publish our standard metrics some time in the next 2 months. > Would you consider holding off on merging this change so that we have > consistant group names and units going forward? Otherwise N2 would be > the odd one out. I will send you the metrics when they are ready, and we > will have a script to generate perf jsons from them, so you can review. > > We also have a slightly different forumula for one of the top down > metrics which I think would be slightly more accurate. We don't have > anything for your "PE utilization" metrics, which I can raise > internally. It could always be added to perf on top of the standardised > ones if we don't add it to our standard ones. > > Thanks > James > Hi James, Regarding the arm n2 standard metrics last time, is my understanding correct, and does it meet your meaning? If so, may I ask when you will send me the standards you formulate so that I can align with you in time over my patchset. Please communicate this matter so that we can understand each other's schedule. Thanks, Jing >> with this series on neoverse-n2: >> >> $./perf list metricgroup >> >> List of pre-defined events (to be used in -e): >> >> >> Metric Groups: >> >> Branch >> Cache >> InstructionMix >> PEutilization >> TLB >> TopDownL1 >> >> >> $./perf list >> >> ... >> Metric Groups: >> >> Branch: >> branch_miss_pred_rate >> [The rate of branches mis-predited to the overall branches] >> branch_mpki >> [The rate of branches mis-predicted per kilo instructions] >> branch_pki >> [The rate of branches retired per kilo instructions] >> Cache: >> l1d_cache_miss_rate >> [The rate of L1 D-Cache misses to the overall L1 D-Cache] >> l1d_cache_mpki >> [The rate of L1 D-Cache misses per kilo instructions] >> ... >> >> >> $sudo ./perf stat -a -M TLB sleep 1 >> >> Performance counter stats for 'system wide': >> >> 35,861,936 L1I_TLB # 0.00 itlb_walk_rate (74.91%) >> 5,661 ITLB_WALK (74.91%) >> 97,279,240 INST_RETIRED # 0.07 itlb_mpki (74.91%) >> 6,851 ITLB_WALK (74.91%) >> 26,391 DTLB_WALK # 0.00 dtlb_walk_rate (75.07%) >> 35,585,545 L1D_TLB (75.07%) >> 85,923,244 INST_RETIRED # 0.35 dtlb_mpki (75.11%) >> 29,992 DTLB_WALK (75.11%) >> >> 1.003450755 seconds time elapsed >> >> >> Jing Zhang (6): >> perf vendor events arm64: Add topdown L1 metrics for neoverse-n2 >> perf vendor events arm64: Add TLB metrics for neoverse-n2 >> perf vendor events arm64: Add cache metrics for neoverse-n2 >> perf vendor events arm64: Add branch metrics for neoverse-n2 >> perf vendor events arm64: Add PE utilization metrics for neoverse-n2 >> perf vendor events arm64: Add instruction mix metrics for neoverse-n2 >> >> .../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++ >> 1 file changed, 247 insertions(+) >> create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json >>
在 2022/11/16 下午7:19, James Clark 写道: > > > On 31/10/2022 11:11, Jing Zhang wrote: >> This series add six metricgroups for neoverse-n2, among which, the >> formula of topdown L1 is from the document: >> https://documentation-service.arm.com/static/60250c7395978b529036da86?token= >> >> Since neoverse-n2 does not yet support topdown L2, metricgroups such >> as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to >> help further analysis of performance bottlenecks. >> > > Hi Jing, > > Thanks for working on this, these metrics look ok to me in general, > although we're currently working on publishing standardised metrics > across all new cores as part of a new project in Arm. This will include > N2, and our ones are very similar (or almost identical) to yours, > barring slightly different group names, metric names, and differences in > things like outputting topdown metrics as percentages. > > We plan to publish our standard metrics some time in the next 2 months. > Would you consider holding off on merging this change so that we have > consistant group names and units going forward? Otherwise N2 would be> the odd one out. I will send you the metrics when they are ready, and we > will have a script to generate perf jsons from them, so you can review. > Do you mean that after you release the new standard metrics, I remake my patch referring to them, such as consistent group names and unit? > We also have a slightly different forumula for one of the top down > metrics which I think would be slightly more accurate. We don't have The v2 version of the patchset updated the formula of topdown L1. Link: https://lore.kernel.org/all/1668411720-3581-1-git-send-email-renyu.zj@linux.alibaba.com/ The formula of the v2 version is more accurate than v1, and it has been verified in our test environment. Can you share your formula first and we can discuss it together? :) Thanks, Jing > anything for your "PE utilization" metrics, which I can raise > internally. It could always be added to perf on top of the standardised > ones if we don't add it to our standard ones. > > Thanks > James > >> with this series on neoverse-n2: >> >> $./perf list metricgroup >> >> List of pre-defined events (to be used in -e): >> >> >> Metric Groups: >> >> Branch >> Cache >> InstructionMix >> PEutilization >> TLB >> TopDownL1 >> >> >> $./perf list >> >> ... >> Metric Groups: >> >> Branch: >> branch_miss_pred_rate >> [The rate of branches mis-predited to the overall branches] >> branch_mpki >> [The rate of branches mis-predicted per kilo instructions] >> branch_pki >> [The rate of branches retired per kilo instructions] >> Cache: >> l1d_cache_miss_rate >> [The rate of L1 D-Cache misses to the overall L1 D-Cache] >> l1d_cache_mpki >> [The rate of L1 D-Cache misses per kilo instructions] >> ... >> >> >> $sudo ./perf stat -a -M TLB sleep 1 >> >> Performance counter stats for 'system wide': >> >> 35,861,936 L1I_TLB # 0.00 itlb_walk_rate (74.91%) >> 5,661 ITLB_WALK (74.91%) >> 97,279,240 INST_RETIRED # 0.07 itlb_mpki (74.91%) >> 6,851 ITLB_WALK (74.91%) >> 26,391 DTLB_WALK # 0.00 dtlb_walk_rate (75.07%) >> 35,585,545 L1D_TLB (75.07%) >> 85,923,244 INST_RETIRED # 0.35 dtlb_mpki (75.11%) >> 29,992 DTLB_WALK (75.11%) >> >> 1.003450755 seconds time elapsed >> >> >> Jing Zhang (6): >> perf vendor events arm64: Add topdown L1 metrics for neoverse-n2 >> perf vendor events arm64: Add TLB metrics for neoverse-n2 >> perf vendor events arm64: Add cache metrics for neoverse-n2 >> perf vendor events arm64: Add branch metrics for neoverse-n2 >> perf vendor events arm64: Add PE utilization metrics for neoverse-n2 >> perf vendor events arm64: Add instruction mix metrics for neoverse-n2 >> >> .../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++ >> 1 file changed, 247 insertions(+) >> create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json >>
On 16/11/2022 15:26, Jing Zhang wrote:
>
>
> 在 2022/11/16 下午7:19, James Clark 写道:
>>
>>
>> On 31/10/2022 11:11, Jing Zhang wrote:
>>> This series add six metricgroups for neoverse-n2, among which, the
>>> formula of topdown L1 is from the document:
>>> https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
>>>
>>> Since neoverse-n2 does not yet support topdown L2, metricgroups such
>>> as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to
>>> help further analysis of performance bottlenecks.
>>>
>>
>> Hi Jing,
>>
>> Thanks for working on this, these metrics look ok to me in general,
>> although we're currently working on publishing standardised metrics
>> across all new cores as part of a new project in Arm. This will include
>> N2, and our ones are very similar (or almost identical) to yours,
>> barring slightly different group names, metric names, and differences in
>> things like outputting topdown metrics as percentages.
>>
>> We plan to publish our standard metrics some time in the next 2 months.
>> Would you consider holding off on merging this change so that we have
>> consistant group names and units going forward? Otherwise N2 would be> the odd one out. I will send you the metrics when they are ready, and we
>> will have a script to generate perf jsons from them, so you can review.
>>
>
> Do you mean that after you release the new standard metrics, I remake my
> patch referring to them, such as consistent group names and unit?
Hi Jing,
I was planning to submit the patch myself, but there will be a script to
generate perf json files, so no manual work would be needed. Although
this is complicated by the fact that we won't be publishing the fixed
TopdownL1 metrics that you have for the existing N2 silicon so there
would be a one time copy paste to fix that part.
>
>
>> We also have a slightly different forumula for one of the top down
>> metrics which I think would be slightly more accurate. We don't have
>
>
> The v2 version of the patchset updated the formula of topdown L1.
> Link: https://lore.kernel.org/all/1668411720-3581-1-git-send-email-renyu.zj@linux.alibaba.com/
>
> The formula of the v2 version is more accurate than v1, and it has been
> verified in our test environment. Can you share your formula first and we
> can discuss it together? :)
I was looking at v2 but replied to the root of the thread by mistake. I
also had it the wrong way round. So your version corrects for the errata
on the current version of N2 (as you mentioned in the commit message).
Our version would be if there is a future new silicon revision with that
fixed, but it does have an extra improvement by subtracting the branch
mispredicts.
Perf doesn't currently match the jsons based on silicon revision, so
we'd have to add something in for that if a fixed silicon version is
released. But this is another problem for another time.
This is the frontend bound metric we have for future revisions:
"100 * ( (STALL_SLOT_FRONTEND/(CPU_CYCLES * 5)) - ((BR_MIS_PRED *
4)/CPU_CYCLES) )"
Other changes are, for example, your 'wasted' metric, we have
'bad_speculation', and without the
cycles subtraction:
100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 - (STALL_SLOT/(CPU_CYCLES *
5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )
And some more details filled in around the units, for example:
{
"MetricName": "bad_speculation",
"MetricExpr": "100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 -
(STALL_SLOT/(CPU_CYCLES * 5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )",
"BriefDescription": "Bad Speculation",
"PublicDescription": "This metric is the percentage of total
slots that executed operations and didn't retire due to a pipeline
flush.\nThis indicates cycles that were utilized but inefficiently.",
"MetricGroup": "TopdownL1",
"ScaleUnit": "1percent of slots"
},
So ignoring the errata issue, the main reason to hold off is for
consistency and churn because these metrics in this format will be
released for all cores going forwards.
Thanks
James
在 2022/11/21 下午7:51, James Clark 写道:
>
>
> On 16/11/2022 15:26, Jing Zhang wrote:
>>
>>
>> 在 2022/11/16 下午7:19, James Clark 写道:
>>>
>>>
>>> On 31/10/2022 11:11, Jing Zhang wrote:
>>>> This series add six metricgroups for neoverse-n2, among which, the
>>>> formula of topdown L1 is from the document:
>>>> https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
>>>>
>>>> Since neoverse-n2 does not yet support topdown L2, metricgroups such
>>>> as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to
>>>> help further analysis of performance bottlenecks.
>>>>
>>>
>>> Hi Jing,
>>>
>>> Thanks for working on this, these metrics look ok to me in general,
>>> although we're currently working on publishing standardised metrics
>>> across all new cores as part of a new project in Arm. This will include
>>> N2, and our ones are very similar (or almost identical) to yours,
>>> barring slightly different group names, metric names, and differences in
>>> things like outputting topdown metrics as percentages.
>>>
>>> We plan to publish our standard metrics some time in the next 2 months.
>>> Would you consider holding off on merging this change so that we have
>>> consistant group names and units going forward? Otherwise N2 would be> the odd one out. I will send you the metrics when they are ready, and we
>>> will have a script to generate perf jsons from them, so you can review.
>>>
>>
>> Do you mean that after you release the new standard metrics, I remake my
>> patch referring to them, such as consistent group names and unit?
>
> Hi Jing,
>
> I was planning to submit the patch myself, but there will be a script to
> generate perf json files, so no manual work would be needed. Although
> this is complicated by the fact that we won't be publishing the fixed
> TopdownL1 metrics that you have for the existing N2 silicon so there
> would be a one time copy paste to fix that part.
>
>>
>>
>>> We also have a slightly different forumula for one of the top down
>>> metrics which I think would be slightly more accurate. We don't have
>>
>>
>> The v2 version of the patchset updated the formula of topdown L1.
>> Link: https://lore.kernel.org/all/1668411720-3581-1-git-send-email-renyu.zj@linux.alibaba.com/
>>
>> The formula of the v2 version is more accurate than v1, and it has been
>> verified in our test environment. Can you share your formula first and we
>> can discuss it together? :)
>
> I was looking at v2 but replied to the root of the thread by mistake. I
> also had it the wrong way round. So your version corrects for the errata
> on the current version of N2 (as you mentioned in the commit message).
> Our version would be if there is a future new silicon revision with that
> fixed, but it does have an extra improvement by subtracting the branch
> mispredicts.
>
> Perf doesn't currently match the jsons based on silicon revision, so
> we'd have to add something in for that if a fixed silicon version is
> released. But this is another problem for another time.
>
Hi James,
Let's do what Ian said, and you can improve it later with the standard metrics,
after the fixed silicon version is released.
> This is the frontend bound metric we have for future revisions:
>
> "100 * ( (STALL_SLOT_FRONTEND/(CPU_CYCLES * 5)) - ((BR_MIS_PRED *
> 4)/CPU_CYCLES) )"
>
> Other changes are, for example, your 'wasted' metric, we have
> 'bad_speculation', and without the
> cycles subtraction:
>
> 100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 - (STALL_SLOT/(CPU_CYCLES *
> 5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )
>
Thanks for sharing your metric version, But I still wonder, is BR_MIS_PRED not classified
as frontend bound? How do you judge the extra improvement by subtracting branch mispredicts?
> And some more details filled in around the units, for example:
>
> {
> "MetricName": "bad_speculation",
> "MetricExpr": "100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 -
> (STALL_SLOT/(CPU_CYCLES * 5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )",
> "BriefDescription": "Bad Speculation",
> "PublicDescription": "This metric is the percentage of total
> slots that executed operations and didn't retire due to a pipeline
> flush.\nThis indicates cycles that were utilized but inefficiently.",
> "MetricGroup": "TopdownL1",
> "ScaleUnit": "1percent of slots"
> },
>
My "wasted" metric was changed according to the arm documentation description, it was originally
"bad_speculation". I will change "wasted" back to "bad_speculation", if you wish.
Thanks,
Jing
> So ignoring the errata issue, the main reason to hold off is for
> consistency and churn because these metrics in this format will be
> released for all cores going forwards.
>
> Thanks
> James
>
On 22/11/2022 07:11, Jing Zhang wrote:
>
>
> 在 2022/11/21 下午7:51, James Clark 写道:
>>
>>
>> On 16/11/2022 15:26, Jing Zhang wrote:
>>>
>>>
>>> 在 2022/11/16 下午7:19, James Clark 写道:
>>>>
>>>>
>>>> On 31/10/2022 11:11, Jing Zhang wrote:
>>>>> This series add six metricgroups for neoverse-n2, among which, the
>>>>> formula of topdown L1 is from the document:
>>>>> https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
>>>>>
>>>>> Since neoverse-n2 does not yet support topdown L2, metricgroups such
>>>>> as Cache, TLB, Branch, InstructionsMix, and PEutilization are added to
>>>>> help further analysis of performance bottlenecks.
>>>>>
>>>>
>>>> Hi Jing,
>>>>
>>>> Thanks for working on this, these metrics look ok to me in general,
>>>> although we're currently working on publishing standardised metrics
>>>> across all new cores as part of a new project in Arm. This will include
>>>> N2, and our ones are very similar (or almost identical) to yours,
>>>> barring slightly different group names, metric names, and differences in
>>>> things like outputting topdown metrics as percentages.
>>>>
>>>> We plan to publish our standard metrics some time in the next 2 months.
>>>> Would you consider holding off on merging this change so that we have
>>>> consistant group names and units going forward? Otherwise N2 would be> the odd one out. I will send you the metrics when they are ready, and we
>>>> will have a script to generate perf jsons from them, so you can review.
>>>>
>>>
>>> Do you mean that after you release the new standard metrics, I remake my
>>> patch referring to them, such as consistent group names and unit?
>>
>> Hi Jing,
>>
>> I was planning to submit the patch myself, but there will be a script to
>> generate perf json files, so no manual work would be needed. Although
>> this is complicated by the fact that we won't be publishing the fixed
>> TopdownL1 metrics that you have for the existing N2 silicon so there
>> would be a one time copy paste to fix that part.
>>
>>>
>>>
>>>> We also have a slightly different forumula for one of the top down
>>>> metrics which I think would be slightly more accurate. We don't have
>>>
>>>
>>> The v2 version of the patchset updated the formula of topdown L1.
>>> Link: https://lore.kernel.org/all/1668411720-3581-1-git-send-email-renyu.zj@linux.alibaba.com/
>>>
>>> The formula of the v2 version is more accurate than v1, and it has been
>>> verified in our test environment. Can you share your formula first and we
>>> can discuss it together? :)
>>
>> I was looking at v2 but replied to the root of the thread by mistake. I
>> also had it the wrong way round. So your version corrects for the errata
>> on the current version of N2 (as you mentioned in the commit message).
>> Our version would be if there is a future new silicon revision with that
>> fixed, but it does have an extra improvement by subtracting the branch
>> mispredicts.
>>
>> Perf doesn't currently match the jsons based on silicon revision, so
>> we'd have to add something in for that if a fixed silicon version is
>> released. But this is another problem for another time.
>>
>
> Hi James,
>
> Let's do what Ian said, and you can improve it later with the standard metrics,
> after the fixed silicon version is released.
>
Ok that's fine by me. I do have one update about our publishing progress
to share. This is the (currently empty) repo that we will be holding our
metrics in: https://gitlab.arm.com/telemetry-solution/telemetry-solution
We'll also have the conversion script in there as well. So there has at
least been some progress and we're getting close. I will keep you
updated when it is populated.
>
>> This is the frontend bound metric we have for future revisions:
>>
>> "100 * ( (STALL_SLOT_FRONTEND/(CPU_CYCLES * 5)) - ((BR_MIS_PRED *
>> 4)/CPU_CYCLES) )"
>>
>> Other changes are, for example, your 'wasted' metric, we have
>> 'bad_speculation', and without the
>> cycles subtraction:
>>
>> 100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 - (STALL_SLOT/(CPU_CYCLES *
>> 5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )
>>
>
> Thanks for sharing your metric version, But I still wonder, is BR_MIS_PRED not classified
> as frontend bound?
We're counting branch mispredicts as an extra cost so we subtract it
from frontend_bound because branch related stalls are covered by
bad_speculation where we have added BR_MIS_PRED instead of subtracting.
Unfortunately I'm just the middle man here, I didn't actually work
directly on producing these metrics so I hope nothing gets lost in my
explanation.
> How do you judge the extra improvement by subtracting branch mispredicts?
As far as I know the repo that I mentioned above will have some
benchmarks and tooling that were used to validate our version. So it
should be apparent by running those.
>
>> And some more details filled in around the units, for example:
>>
>> {
>> "MetricName": "bad_speculation",
>> "MetricExpr": "100 * ( ((1 - (OP_RETIRED/OP_SPEC)) * (1 -
>> (STALL_SLOT/(CPU_CYCLES * 5)))) + ((BR_MIS_PRED * 4)/CPU_CYCLES) )",
>> "BriefDescription": "Bad Speculation",
>> "PublicDescription": "This metric is the percentage of total
>> slots that executed operations and didn't retire due to a pipeline
>> flush.\nThis indicates cycles that were utilized but inefficiently.",
>> "MetricGroup": "TopdownL1",
>> "ScaleUnit": "1percent of slots"
>> },
>>
>
> My "wasted" metric was changed according to the arm documentation description, it was originally
> "bad_speculation". I will change "wasted" back to "bad_speculation", if you wish.
Yeah that would be good. I think since that document we've tried to
align names more to what was already out there and bad_speculation was
probably judged to be a better description. For example it's already
used in tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
>
>
> Thanks,
> Jing
>
>
>> So ignoring the errata issue, the main reason to hold off is for
>> consistency and churn because these metrics in this format will be
>> released for all cores going forwards.
>>
>> Thanks
>> James
>>
Changes since v1:
- Corrected formula for topdown L1 due to wrong counts for stall_slot and
stall_slot_frontend;
- Link: https://lore.kernel.org/all/1667214694-89839-1-git-send-email-renyu.zj@linux.alibaba.com/
This series add six metricgroups for neoverse-n2, among which, the formula of
topdown L1 is from the document:
https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
Due to the wrong count of stall_slot and stall_slot_frontend in neoverse-n2, the
real stall_slot and real stall_slot_frontend need to subtract cpu_cycles, so
when calculating the topdownL1 metrics, stall_slot and stall_slot_frontend are
corrected.
Since neoverse-n2 does not yet support topdown L2, metricgroups such as Cache,
TLB, Branch, InstructionsMix, and PEutilization are added to help further
analysis of performance bottlenecks.
with this series on neoverse-n2:
$./perf list
...
Metric Groups:
Branch:
branch_miss_pred_rate
[The rate of branches mis-predited to the overall branches]
branch_mpki
[The rate of branches mis-predicted per kilo instructions]
branch_pki
[The rate of branches retired per kilo instructions]
Cache:
l1d_cache_miss_rate
[The rate of L1 D-Cache misses to the overall L1 D-Cache]
l1d_cache_mpki
[The rate of L1 D-Cache misses per kilo instructions]
...
$sudo ./perf stat -a -M TLB sleep 1
Performance counter stats for 'system wide':
35,861,936 L1I_TLB # 0.00 itlb_walk_rate (74.91%)
5,661 ITLB_WALK (74.91%)
97,279,240 INST_RETIRED # 0.07 itlb_mpki (74.91%)
6,851 ITLB_WALK (74.91%)
26,391 DTLB_WALK # 0.00 dtlb_walk_rate (75.07%)
35,585,545 L1D_TLB (75.07%)
85,923,244 INST_RETIRED # 0.35 dtlb_mpki (75.11%)
29,992 DTLB_WALK (75.11%)
1.003450755 seconds time elapsed
$sudo ./perf stat -M TopDownL1 false_sharing 2
Performance counter stats for 'false_sharing 2':
3,388,884,713 cpu_cycles # 0.05 retiring
# 0.00 wasted (66.59%)
19,495,064,576 stall_slot (66.59%)
838,235,126 op_spec (66.59%)
836,787,162 op_retired (66.59%)
3,380,520,038 cpu_cycles # 0.29 frontend_bound (67.15%)
8,267,545,049 stall_slot_frontend (67.15%)
3,389,138,804 cpu_cycles # 0.67 backend_bound (66.66%)
11,337,766,816 stall_slot_backend (66.66%)
0.442572628 seconds time elapsed
1.235153000 seconds user
0.000000000 seconds sys
Jing Zhang (6):
perf vendor events arm64: Add topdown L1 metrics for neoverse-n2
perf vendor events arm64: Add TLB metrics for neoverse-n2
perf vendor events arm64: Add cache metrics for neoverse-n2
perf vendor events arm64: Add branch metrics for neoverse-n2
perf vendor events arm64: Add PE utilization metrics for neoverse-n2
perf vendor events arm64: Add instruction mix metrics for neoverse-n2
.../arch/arm64/arm/neoverse-n2/metrics.json | 247 +++++++++++++++++++++
1 file changed, 247 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
--
1.8.3.1
The calculation formula of topdown L1 is from the document:
https://documentation-service.arm.com/static/60250c7395978b529036da86?token=
However, due to the wrong count of stall_slot and stall_slot_frontend
in neoverse-n2, the real stall_slot and real stall_slot_frontend need
to subtract cpu_cycles, so when calculating the topdownL1 metrics,
stall_slot and stall_slot_frontend are corrected.
Since neoverse-n2 does not yet support topdown L2, metricgroups such
as Cache, TLB, Branch, InstructionsMix, and PEutilization will be
added to further analysis of performance bottlenecks in the following
patches.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
new file mode 100644
index 0000000..0048dfe
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -0,0 +1,30 @@
+[
+ {
+ "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
+ "PublicDescription": "Frontend bound L1 topdown metric",
+ "BriefDescription": "Frontend bound L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "frontend_bound"
+ },
+ {
+ "MetricExpr": "(1 - op_retired / op_spec) * (1 - (stall_slot - cpu_cycles) / (5 * cpu_cycles))",
+ "PublicDescription": "Wasted L1 topdown metric",
+ "BriefDescription": "Wasted L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "wasted"
+ },
+ {
+ "MetricExpr": "(op_retired / op_spec) * (1 - (stall_slot - cpu_cycles) / (5 * cpu_cycles))",
+ "PublicDescription": "Retiring L1 topdown metric",
+ "BriefDescription": "Retiring L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "retiring"
+ },
+ {
+ "MetricExpr": "stall_slot_backend / (5 * cpu_cycles)",
+ "PublicDescription": "Backend Bound L1 topdown metric",
+ "BriefDescription": "Backend Bound L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "backend_bound"
+ }
+]
\ No newline at end of file
--
1.8.3.1On 14/11/2022 07:41, Jing Zhang wrote: > The calculation formula of topdown L1 is from the document: > https://urldefense.com/v3/__https://documentation-service.arm.com/static/60250c7395978b529036da86?token=__;!!ACWV5N9M2RV99hQ!Ll-Jgvfs0LitTCU-hC6i6BKBVJfhke-pbQq2VoO-gmuSAcglQ3ZqMVMd2r0An_5a3ZDPYmn8zXuCrpUbehwnLHplVQ$ So since this is a from "standard" document, did you consider putting these as an arch std event? I think arch std events would work for metrics, like they do for regular events. > > However, due to the wrong count of stall_slot and stall_slot_frontend > in neoverse-n2, the real stall_slot and real stall_slot_frontend need > to subtract cpu_cycles, so when calculating the topdownL1 metrics, > stall_slot and stall_slot_frontend are corrected. Is there a reference to this? It would be indeed useful to pass a link to the n2 doc as these metrics are not part of the arm64 arm. At least I assume that they are not there. > > Since neoverse-n2 does not yet support topdown L2, metricgroups such > as Cache, TLB, Branch, InstructionsMix, and PEutilization will be > added to further analysis of performance bottlenecks in the following > patches. > Thanks, John
在 2022/11/14 下午8:59, John Garry 写道: > On 14/11/2022 07:41, Jing Zhang wrote: >> The calculation formula of topdown L1 is from the document: >> https://urldefense.com/v3/__https://documentation-service.arm.com/static/60250c7395978b529036da86?token=__;!!ACWV5N9M2RV99hQ!Ll-Jgvfs0LitTCU-hC6i6BKBVJfhke-pbQq2VoO-gmuSAcglQ3ZqMVMd2r0An_5a3ZDPYmn8zXuCrpUbehwnLHplVQ$ > > So since this is a from "standard" document, did you consider putting these as an arch std event? I think arch std events would work for metrics, like they do for regular events. > I didn't find out how to put the metric as an arch std event, it would be best if you could provide me with an example in the upstream code, thank you very much. >> >> However, due to the wrong count of stall_slot and stall_slot_frontend >> in neoverse-n2, the real stall_slot and real stall_slot_frontend need >> to subtract cpu_cycles, so when calculating the topdownL1 metrics, >> stall_slot and stall_slot_frontend are corrected. > > Is there a reference to this? It would be indeed useful to pass a link to the n2 doc as these metrics are not part of the arm64 arm. At least I assume that they are not there. > You are right, I need to add a doc link. ARM has released the n2 ERRATA document about the incorrect count of stall_slot and stall_slot_frontend, and provides a workaround to get the correct value. Link: https://developer.arm.com/documentation/SDEN1982442/1200/?lang=en >> >> Since neoverse-n2 does not yet support topdown L2, metricgroups such >> as Cache, TLB, Branch, InstructionsMix, and PEutilization will be >> added to further analysis of performance bottlenecks in the following >> patches. >> > > > Thanks, > John Best Regards, Jing
On 15/11/2022 08:43, Jing Zhang wrote:
> I didn't find out how to put the metric as an arch std event, it would be best if you could provide me with an example in the upstream code,
> thank you very much.
As things stand, I don't think it's supported. We only support regular
events for std arch events (and not metrics).
However we could expand support for metrics.
For the example of hip08 and FRONTEND_BOUND, we would have:
--->8---
diff --git
a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
index 6443a061e22a..5b1ca45224de 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
@@ -1,10 +1,6 @@
[
{
- "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
- "PublicDescription": "Frontend bound L1 topdown metric",
- "BriefDescription": "Frontend bound L1 topdown metric",
- "MetricGroup": "TopDownL1",
- "MetricName": "frontend_bound"
+ "ArchStdEvent": "FRONTEND_BOUND"
},
{
"MetricExpr": "(INST_SPEC - INST_RETIRED) / (4 * CPU_CYCLES)",
diff --git a/tools/perf/pmu-events/arch/arm64/sbsa.json
b/tools/perf/pmu-events/arch/arm64/sbsa.json
new file mode 100644
index 000000000000..10b9c0cccc40
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
@@ -0,0 +1,9 @@
+[
+ {
+ "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
+ "PublicDescription": "Frontend bound L1 topdown metric",
+ "BriefDescription": "Frontend bound L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "FRONTEND_BOUND"
+ }
+]
diff --git a/tools/perf/pmu-events/jevents.py
b/tools/perf/pmu-events/jevents.py
index 0daa3e007528..77049853c0bf 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -352,6 +352,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
for event in read_json_events(item.path, topic=''):
if event.name:
_arch_std_events[event.name.lower()] = event
+ if event.metric_name:
+ _arch_std_events[event.metric_name.lower()] = event
def print_events_table_prefix(tblname: str) -> None:
--
2.35.3
Note that this is for illustration only. The frontend bound metric for
hip08 does not really belong in sbsa.json as it does not adhere to that
spec. But for platforms which do adhere to the spec, we could pick up
the metrics values from sbsa.json (or whatever we want to call it).
>
>>> However, due to the wrong count of stall_slot and stall_slot_frontend
>>> in neoverse-n2, the real stall_slot and real stall_slot_frontend need
>>> to subtract cpu_cycles, so when calculating the topdownL1 metrics,
>>> stall_slot and stall_slot_frontend are corrected.
>> Is there a reference to this? It would be indeed useful to pass a link to the n2 doc as these metrics are not part of the arm64 arm. At least I assume that they are not there.
>>
> You are right, I need to add a doc link. ARM has released the n2 ERRATA document about the incorrect count of stall_slot and stall_slot_frontend,
> and provides a workaround to get the correct value.
> Link:https://urldefense.com/v3/__https://developer.arm.com/documentation/SDEN1982442/1200/?lang=en__;!!ACWV5N9M2RV99hQ!I3rCI-RcuDmpfAiWhA_SAxRrq1hCyhA9am8YmrwizljPz9X_G4H_odm_4aRgRo8VswDeC3TATbylxf_vhAJhWbJrlw$
>
Note that std arch events support is such that we can still overwrite
individual std values in the platform-specific json (or at least we used
to be able to - I have not checked recently). So for n2 case of
stall_slot, we could use std arch events in the n2 json but overwrite
the metric expression, like:
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
@@ -1,10 +1,6 @@
[
{
"ArchStdEvent": "FRONTEND_BOUND"
"MetricExpr": <insert n2 specific expression>",
},
Thanks,
John
在 2022/11/15 下午7:19, John Garry 写道:
> On 15/11/2022 08:43, Jing Zhang wrote:
>> I didn't find out how to put the metric as an arch std event, it would be best if you could provide me with an example in the upstream code,
>> thank you very much.
>
> As things stand, I don't think it's supported. We only support regular events for std arch events (and not metrics).
>
> However we could expand support for metrics.
>
> For the example of hip08 and FRONTEND_BOUND, we would have:
>
> --->8---
>
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> index 6443a061e22a..5b1ca45224de 100644
> --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
> @@ -1,10 +1,6 @@
> [
> {
> - "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
> - "PublicDescription": "Frontend bound L1 topdown metric",
> - "BriefDescription": "Frontend bound L1 topdown metric",
> - "MetricGroup": "TopDownL1",
> - "MetricName": "frontend_bound"
> + "ArchStdEvent": "FRONTEND_BOUND"
> },
> {
> "MetricExpr": "(INST_SPEC - INST_RETIRED) / (4 * CPU_CYCLES)",
> diff --git a/tools/perf/pmu-events/arch/arm64/sbsa.json b/tools/perf/pmu-events/arch/arm64/sbsa.json
> new file mode 100644
> index 000000000000..10b9c0cccc40
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
> @@ -0,0 +1,9 @@
> +[
> + {
> + "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
> + "PublicDescription": "Frontend bound L1 topdown metric",
> + "BriefDescription": "Frontend bound L1 topdown metric",
> + "MetricGroup": "TopDownL1",
> + "MetricName": "FRONTEND_BOUND"
> + }
> +]
> diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
> index 0daa3e007528..77049853c0bf 100755
> --- a/tools/perf/pmu-events/jevents.py
> +++ b/tools/perf/pmu-events/jevents.py
> @@ -352,6 +352,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
> for event in read_json_events(item.path, topic=''):
> if event.name:
> _arch_std_events[event.name.lower()] = event
> + if event.metric_name:
> + _arch_std_events[event.metric_name.lower()] = event
>
>
> def print_events_table_prefix(tblname: str) -> None:
Sorry for slow response.
I tried the method you provided, but it didn't work, is there any other steps I am missing?
Or is this method not currently supported?
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics
index 8ff1dfe..2ad30ec 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -1,10 +1,6 @@
[
{
- "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
- "PublicDescription": "Frontend bound L1 topdown metric",
- "BriefDescription": "Frontend bound L1 topdown metric",
- "MetricGroup": "TopDownL1",
- "MetricName": "frontend_bound"
+ "ArchStdEvent": "FRONTEND_BOUND"
},
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeli
index f9fae15..e8536e2 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
@@ -6,9 +6,6 @@
{
"ArchStdEvent": "STALL_BACKEND_MEM"
- }
+ },
+ {
+ "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
+ "PublicDescription": "Frontend bound L1 topdown metric",
+ "BriefDescription": "Frontend bound L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "FRONTEND_BOUND"
+ }
]
diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
index 0daa3e0..7704985 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -352,6 +352,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
for event in read_json_events(item.path, topic=''):
if event.name:
_arch_std_events[event.name.lower()] = event
+ if event.metric_name:
+ _arch_std_events[event.metric_name.lower()] = event
#./perf stat -e FRONTEND_BOUND sleep 1
event syntax error: 'FRONTEND_BOUND'
\___ parser error
Run 'perf list' for a list of valid events
Usage: perf stat [<options>] [<command>]
-e, --event <event> event selector. use 'perf list' to list available events
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeli
index f9fae15..1089ca0 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
@@ -6,18 +6,24 @@
"ArchStdEvent": "STALL_BACKEND"
},
{
- "ArchStdEvent": "STALL_SLOT_FRONTEND"
+ "ArchStdEvent": "STALL_SLOT_FRONTEND",
+ "MetricExpr": "STALL_SLOT_FRONTEND - CPU_CYCLES"
},
{
#./perf stat -e stall_slot_frontend sleep 1
Add CPU_CYCLES event to groups to get metric expression for stall_slot_frontend
Performance counter stats for 'sleep 1':
5,125,457 stall_slot_frontend //it's still the original value.
1.001017680 seconds time elapsed
0.001162000 seconds user
0.000000000 seconds sys
Thanks,
Jing
>
>
> #./perf stat -e FRONTEND_BOUND sleep 1
> event syntax error: 'FRONTEND_BOUND'
For metrics, use -M, not -e
If this doesn't help, verify generated pmu-events/pmu-events.c is same
after you make the change to try to use std arch events for metrics.
Note that I never tested running my change.
Thanks,
John
> \___ parser error
> Run 'perf list' for a list of valid events
>
> Usage: perf stat [<options>] [<command>]
>
> -e, --event <event> event selector. use 'perf list' to list available events
>
>
>
> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeli
> index f9fae15..1089ca0 100644
> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
> @@ -6,18 +6,24 @@
> "ArchStdEvent": "STALL_BACKEND"
> },
> {
> - "ArchStdEvent": "STALL_SLOT_FRONTEND"
> + "ArchStdEvent": "STALL_SLOT_FRONTEND",
> + "MetricExpr": "STALL_SLOT_FRONTEND - CPU_CYCLES"
> },
> {
>
在 2022/11/21 下午6:22, John Garry 写道:
>
>>
>>
>> #./perf stat -e FRONTEND_BOUND sleep 1
>> event syntax error: 'FRONTEND_BOUND'
>
> For metrics, use -M, not -e
>
> If this doesn't help, verify generated pmu-events/pmu-events.c is same after you make the change to try to use std arch events for metrics. Note that I never tested running my change.
>
> Thanks,
> John
>
>> \___ parser error
>> Run 'perf list' for a list of valid events
>>
>> Usage: perf stat [<options>] [<command>]
>>
>> -e, --event <event> event selector. use 'perf list' to list available events
>>
>>
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeli
>> index f9fae15..1089ca0 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/pipeline.json
>> @@ -6,18 +6,24 @@
>> "ArchStdEvent": "STALL_BACKEND"
>> },
>> {
>> - "ArchStdEvent": "STALL_SLOT_FRONTEND"
>> + "ArchStdEvent": "STALL_SLOT_FRONTEND",
>> + "MetricExpr": "STALL_SLOT_FRONTEND - CPU_CYCLES"
>> },
>> {
>>
I'm sorry that I misunderstood the purpose of putting metric as arch_std_event at first,
and now it works after the modification over your suggestion.
But there are also a few questions:
1. The value of the slot in the topdownL1 is various in different architectures, for example,
the slot is 5 on neoverse-n2. If I put topdownL1 metric as arch_std_event, then I need to
specify the slot to 5 in n2. I can specify slot values in metric like below, but is there any
other concise way to do this?
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index 8ff1dfe..b473baf 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -1,4 +1,23 @@
[
+ {
+ "MetricExpr": "5",
+ "PublicDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
+ "BriefDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
+ "MetricName": "slot"
+ },
+ {
+ "ArchStdEvent": "FRONTEND_BOUND"
+ },
+ {
+ "ArchStdEvent": "BACKEND_BOUND"
+ },
+ {
+ "ArchStdEvent": "WASTED"
+ },
+ {
+ "ArchStdEvent": "RETIRING"
+ },
2. Should I add the topdownL1 metric to tools/perf/pmu-event/recommended.json,
or create a new json file to place the general metric?
Looking forward to your reply.
Thanks,
Jing
On 21/11/2022 15:17, Jing Zhang wrote:
> I'm sorry that I misunderstood the purpose of putting metric as arch_std_event at first,
> and now it works after the modification over your suggestion.
>
> But there are also a few questions:
>
> 1. The value of the slot in the topdownL1 is various in different architectures, for example,
> the slot is 5 on neoverse-n2. If I put topdownL1 metric as arch_std_event, then I need to
> specify the slot to 5 in n2. I can specify slot values in metric like below, but is there any
> other concise way to do this?
>
> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> index 8ff1dfe..b473baf 100644
> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -1,4 +1,23 @@
> [
> + {
> + "MetricExpr": "5",
> + "PublicDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
> + "BriefDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
> + "MetricName": "slot"
Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
opinion on this? It is possible to reuse metrics, so it should work, but...
One problem is that "slot" would show up as a metric, which you would
not want.
Alternatively I was going to suggest that you can overwrite specific std
arch event attributes. So for example of frontend_bound, you could have:
+ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -0,0 +1,30 @@
[
{
"ArchStdEvent": "FRONTEND_BOUND",
"MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
cpu_cycles)",
},
> + }
> + {
> + "ArchStdEvent": "FRONTEND_BOUND"
> + },
> + {
> + "ArchStdEvent": "BACKEND_BOUND"
> + },
> + {
> + "ArchStdEvent": "WASTED"
> + },
> + {
> + "ArchStdEvent": "RETIRING"
> + },
>
>
> 2. Should I add the topdownL1 metric to tools/perf/pmu-event/recommended.json,
> or create a new json file to place the general metric?
It would not belong in recommended.json as that is specifically for
arch-recommended events. It would really just depend on where the value
comes from, i.e. arm arm or sbsa.
>
> Looking forward to your reply.
On 21/11/2022 17:55, John Garry wrote:
> On 21/11/2022 15:17, Jing Zhang wrote:
>> I'm sorry that I misunderstood the purpose of putting metric as
>> arch_std_event at first,
>> and now it works after the modification over your suggestion.
>>
>> But there are also a few questions:
>>
>> 1. The value of the slot in the topdownL1 is various in different
>> architectures, for example,
>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as
>> arch_std_event, then I need to
>> specify the slot to 5 in n2. I can specify slot values in metric like
>> below, but is there any
>> other concise way to do this?
>>
>> diff --git
>> a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> index 8ff1dfe..b473baf 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -1,4 +1,23 @@
>> [
>> + {
>> + "MetricExpr": "5",
>> + "PublicDescription": "A pipeline slot represents the
>> hardware resources needed to process one uOp",
>> + "BriefDescription": "A pipeline slot represents the
>> hardware resources needed to process one uOp",
>> + "MetricName": "slot"
>
> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
> opinion on this? It is possible to reuse metrics, so it should work, but...
>
> One problem is that "slot" would show up as a metric, which you would
> not want.
>
> Alternatively I was going to suggest that you can overwrite specific std
> arch event attributes. So for example of frontend_bound, you could have:
I would agree with not having this and just hard coding the 5 wherever
it's needed. Once we have a few different sets of metrics in place maybe
we can start to look at deduplication, but for now I don't see the value.
>
> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -0,0 +1,30 @@
> [
> {
> "ArchStdEvent": "FRONTEND_BOUND",
> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
> cpu_cycles)",
> },
>
>> + }
>> + {
>> + "ArchStdEvent": "FRONTEND_BOUND"
>> + },
>> + {
>> + "ArchStdEvent": "BACKEND_BOUND"
>> + },
>> + {
>> + "ArchStdEvent": "WASTED"
>> + },
>> + {
>> + "ArchStdEvent": "RETIRING"
>> + },
>>
>>
>> 2. Should I add the topdownL1 metric to
>> tools/perf/pmu-event/recommended.json,
>> or create a new json file to place the general metric?
>
> It would not belong in recommended.json as that is specifically for
> arch-recommended events. It would really just depend on where the value
> comes from, i.e. arm arm or sbsa.
>
For what we're going to publish shortly we'll be generating a
metrics.json file for each CPU. It will be autogenerated so I don't
think duplication will be an issue and I'm expecting that there will be
differences in the topdown metrics between CPUs anyway. So I would also
vote to not put it in recommended.json
>>
>> Looking forward to your reply.
>
在 2022/11/22 下午10:00, James Clark 写道:
>
>
> On 21/11/2022 17:55, John Garry wrote:
>> On 21/11/2022 15:17, Jing Zhang wrote:
>>> I'm sorry that I misunderstood the purpose of putting metric as
>>> arch_std_event at first,
>>> and now it works after the modification over your suggestion.
>>>
>>> But there are also a few questions:
>>>
>>> 1. The value of the slot in the topdownL1 is various in different
>>> architectures, for example,
>>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as
>>> arch_std_event, then I need to
>>> specify the slot to 5 in n2. I can specify slot values in metric like
>>> below, but is there any
>>> other concise way to do this?
>>>
>>> diff --git
>>> a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> index 8ff1dfe..b473baf 100644
>>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> @@ -1,4 +1,23 @@
>>> [
>>> + {
>>> + "MetricExpr": "5",
>>> + "PublicDescription": "A pipeline slot represents the
>>> hardware resources needed to process one uOp",
>>> + "BriefDescription": "A pipeline slot represents the
>>> hardware resources needed to process one uOp",
>>> + "MetricName": "slot"
>>
>> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
>> opinion on this? It is possible to reuse metrics, so it should work, but...
>>
>> One problem is that "slot" would show up as a metric, which you would
>> not want.
>>
>> Alternatively I was going to suggest that you can overwrite specific std
>> arch event attributes. So for example of frontend_bound, you could have:
>
> I would agree with not having this and just hard coding the 5 wherever
> it's needed. Once we have a few different sets of metrics in place maybe
> we can start to look at deduplication, but for now I don't see the value.
>
>>
>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -0,0 +1,30 @@
>> [
>> {
>> "ArchStdEvent": "FRONTEND_BOUND",
>> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
>> cpu_cycles)",
>> },
>>
>>> + }
>>> + {
>>> + "ArchStdEvent": "FRONTEND_BOUND"
>>> + },
>>> + {
>>> + "ArchStdEvent": "BACKEND_BOUND"
>>> + },
>>> + {
>>> + "ArchStdEvent": "WASTED"
>>> + },
>>> + {
>>> + "ArchStdEvent": "RETIRING"
>>> + },
>>>
>>>
>>> 2. Should I add the topdownL1 metric to
>>> tools/perf/pmu-event/recommended.json,
>>> or create a new json file to place the general metric?
>>
>> It would not belong in recommended.json as that is specifically for
>> arch-recommended events. It would really just depend on where the value
>> comes from, i.e. arm arm or sbsa.
>>
>
> For what we're going to publish shortly we'll be generating a
> metrics.json file for each CPU. It will be autogenerated so I don't
> think duplication will be an issue and I'm expecting that there will be
> differences in the topdown metrics between CPUs anyway. So I would also
> vote to not put it in recommended.json
>
I will create a new sbsa.json file in tools/perf/pmu-events/arch/arm64/
to place metrics that may be common between some CPUs, just like arch_std_event.
If the topdown metrics are different in other CPUs, we can overwrite the
metric expression.
For example:
+++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
@@ -0,0 +1,9 @@
+[
+ {
+ "MetricExpr": "stall_slot_frontend / (slot * cpu_cycles)",
+ "PublicDescription": "Frontend bound L1 topdown metric",
+ "BriefDescription": "Frontend bound L1 topdown metric",
+ "MetricGroup": "TopDownL1",
+ "MetricName": "FRONTEND_BOUND"
+ }
+]
+ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -0,0 +1,30 @@
+[
+ {
+ "ArchStdEvent": "FRONTEND_BOUND",
+ "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
+ }
+]
In addition, I can also add TLB, Cache, Branch, InstructionMix, PEutilization
and other metric groups into sbsa.json, because they are also applicable to
neoverse-n1. Above metrics are described in the documentation of neoverse-n1:
https://developer.arm.com/documentation/PJDOC-466751330-547673/r4p1/
Thanks,
Jing
>>>
>>> Looking forward to your reply.
>>
On 22/11/2022 15:41, Jing Zhang wrote:
>
>
> 在 2022/11/22 下午10:00, James Clark 写道:
>>
>>
>> On 21/11/2022 17:55, John Garry wrote:
>>> On 21/11/2022 15:17, Jing Zhang wrote:
>>>> I'm sorry that I misunderstood the purpose of putting metric as
>>>> arch_std_event at first,
>>>> and now it works after the modification over your suggestion.
>>>>
>>>> But there are also a few questions:
>>>>
>>>> 1. The value of the slot in the topdownL1 is various in different
>>>> architectures, for example,
>>>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as
>>>> arch_std_event, then I need to
>>>> specify the slot to 5 in n2. I can specify slot values in metric like
>>>> below, but is there any
>>>> other concise way to do this?
>>>>
>>>> diff --git
>>>> a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>> b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>> index 8ff1dfe..b473baf 100644
>>>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>> @@ -1,4 +1,23 @@
>>>> [
>>>> + {
>>>> + "MetricExpr": "5",
>>>> + "PublicDescription": "A pipeline slot represents the
>>>> hardware resources needed to process one uOp",
>>>> + "BriefDescription": "A pipeline slot represents the
>>>> hardware resources needed to process one uOp",
>>>> + "MetricName": "slot"
>>>
>>> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
>>> opinion on this? It is possible to reuse metrics, so it should work, but...
>>>
>>> One problem is that "slot" would show up as a metric, which you would
>>> not want.
>>>
>>> Alternatively I was going to suggest that you can overwrite specific std
>>> arch event attributes. So for example of frontend_bound, you could have:
>>
>> I would agree with not having this and just hard coding the 5 wherever
>> it's needed. Once we have a few different sets of metrics in place maybe
>> we can start to look at deduplication, but for now I don't see the value.
>>
>>>
>>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> @@ -0,0 +1,30 @@
>>> [
>>> {
>>> "ArchStdEvent": "FRONTEND_BOUND",
>>> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
>>> cpu_cycles)",
>>> },
>>>
>>>> + }
>>>> + {
>>>> + "ArchStdEvent": "FRONTEND_BOUND"
>>>> + },
>>>> + {
>>>> + "ArchStdEvent": "BACKEND_BOUND"
>>>> + },
>>>> + {
>>>> + "ArchStdEvent": "WASTED"
>>>> + },
>>>> + {
>>>> + "ArchStdEvent": "RETIRING"
>>>> + },
>>>>
>>>>
>>>> 2. Should I add the topdownL1 metric to
>>>> tools/perf/pmu-event/recommended.json,
>>>> or create a new json file to place the general metric?
>>>
>>> It would not belong in recommended.json as that is specifically for
>>> arch-recommended events. It would really just depend on where the value
>>> comes from, i.e. arm arm or sbsa.
>>>
>>
>> For what we're going to publish shortly we'll be generating a
>> metrics.json file for each CPU. It will be autogenerated so I don't
>> think duplication will be an issue and I'm expecting that there will be
>> differences in the topdown metrics between CPUs anyway. So I would also
>> vote to not put it in recommended.json
>>
>
> I will create a new sbsa.json file in tools/perf/pmu-events/arch/arm64/
> to place metrics that may be common between some CPUs, just like arch_std_event.
Because this would apply to all CPUs rather than just N2, I still think
it's best to wait for our metrics repo to be published. Otherwise Arm
will start publishing metrics with names and group names for all future
CPUs that have different names to the common ones added as part of this
change.
It's something that we've been working on for quite a while and we've
taken care to make sure that it applies to future products and is scalable.
It would be easier to add these right now only for N2, and then
afterwards we can start to look at what is common and could be factored
out into the top level folder.
> If the topdown metrics are different in other CPUs, we can overwrite the
> metric expression.
True, but with different group names and metric names and units it could
get slightly complicated.
>
> For example:
>
> +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
> @@ -0,0 +1,9 @@
> +[
> + {
> + "MetricExpr": "stall_slot_frontend / (slot * cpu_cycles)",
> + "PublicDescription": "Frontend bound L1 topdown metric",
> + "BriefDescription": "Frontend bound L1 topdown metric",
> + "MetricGroup": "TopDownL1",
> + "MetricName": "FRONTEND_BOUND"
> + }
> +]
>
> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -0,0 +1,30 @@
> +[
> + {
> + "ArchStdEvent": "FRONTEND_BOUND",
> + "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
> + }
> +]
>
With the auto generation of metrics file I don't really see too much
benefit of doing it this way.
You also run into the issue where if a platform happens to define all of
the events required by a metric, will that metric appear automatically,
even if it's not valid?
>
> In addition, I can also add TLB, Cache, Branch, InstructionMix, PEutilization
> and other metric groups into sbsa.json, because they are also applicable to
> neoverse-n1. Above metrics are described in the documentation of neoverse-n1:
> https://developer.arm.com/documentation/PJDOC-466751330-547673/r4p1/
>
>
> Thanks,
> Jing
>
>
>>>>
>>>> Looking forward to your reply.
>>>
在 2022/11/23 下午10:26, James Clark 写道:
>
>
> On 22/11/2022 15:41, Jing Zhang wrote:
>>
>>
>> 在 2022/11/22 下午10:00, James Clark 写道:
>>>
>>>
>>> On 21/11/2022 17:55, John Garry wrote:
>>>> On 21/11/2022 15:17, Jing Zhang wrote:
>>>>> I'm sorry that I misunderstood the purpose of putting metric as
>>>>> arch_std_event at first,
>>>>> and now it works after the modification over your suggestion.
>>>>>
>>>>> But there are also a few questions:
>>>>>
>>>>> 1. The value of the slot in the topdownL1 is various in different
>>>>> architectures, for example,
>>>>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as
>>>>> arch_std_event, then I need to
>>>>> specify the slot to 5 in n2. I can specify slot values in metric like
>>>>> below, but is there any
>>>>> other concise way to do this?
>>>>>
>>>>> diff --git
>>>>> a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>> b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>> index 8ff1dfe..b473baf 100644
>>>>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>> @@ -1,4 +1,23 @@
>>>>> [
>>>>> + {
>>>>> + "MetricExpr": "5",
>>>>> + "PublicDescription": "A pipeline slot represents the
>>>>> hardware resources needed to process one uOp",
>>>>> + "BriefDescription": "A pipeline slot represents the
>>>>> hardware resources needed to process one uOp",
>>>>> + "MetricName": "slot"
>>>>
>>>> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
>>>> opinion on this? It is possible to reuse metrics, so it should work, but...
>>>>
>>>> One problem is that "slot" would show up as a metric, which you would
>>>> not want.
>>>>
>>>> Alternatively I was going to suggest that you can overwrite specific std
>>>> arch event attributes. So for example of frontend_bound, you could have:
>>>
>>> I would agree with not having this and just hard coding the 5 wherever
>>> it's needed. Once we have a few different sets of metrics in place maybe
>>> we can start to look at deduplication, but for now I don't see the value.
>>>
>>>>
>>>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>> @@ -0,0 +1,30 @@
>>>> [
>>>> {
>>>> "ArchStdEvent": "FRONTEND_BOUND",
>>>> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
>>>> cpu_cycles)",
>>>> },
>>>>
>>>>> + }
>>>>> + {
>>>>> + "ArchStdEvent": "FRONTEND_BOUND"
>>>>> + },
>>>>> + {
>>>>> + "ArchStdEvent": "BACKEND_BOUND"
>>>>> + },
>>>>> + {
>>>>> + "ArchStdEvent": "WASTED"
>>>>> + },
>>>>> + {
>>>>> + "ArchStdEvent": "RETIRING"
>>>>> + },
>>>>>
>>>>>
>>>>> 2. Should I add the topdownL1 metric to
>>>>> tools/perf/pmu-event/recommended.json,
>>>>> or create a new json file to place the general metric?
>>>>
>>>> It would not belong in recommended.json as that is specifically for
>>>> arch-recommended events. It would really just depend on where the value
>>>> comes from, i.e. arm arm or sbsa.
>>>>
>>>
>>> For what we're going to publish shortly we'll be generating a
>>> metrics.json file for each CPU. It will be autogenerated so I don't
>>> think duplication will be an issue and I'm expecting that there will be
>>> differences in the topdown metrics between CPUs anyway. So I would also
>>> vote to not put it in recommended.json
>>>
>>
>> I will create a new sbsa.json file in tools/perf/pmu-events/arch/arm64/
>> to place metrics that may be common between some CPUs, just like arch_std_event.
>
> Because this would apply to all CPUs rather than just N2, I still think
> it's best to wait for our metrics repo to be published. Otherwise Arm
> will start publishing metrics with names and group names for all future
> CPUs that have different names to the common ones added as part of this
> change.
>
> It's something that we've been working on for quite a while and we've
> taken care to make sure that it applies to future products and is scalable.
>
> It would be easier to add these right now only for N2, and then
> afterwards we can start to look at what is common and could be factored
> out into the top level folder.
>
>> If the topdown metrics are different in other CPUs, we can overwrite the
>> metric expression.
>
> True, but with different group names and metric names and units it could
> get slightly complicated.
>
>>
>> For example:
>>
>> +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
>> @@ -0,0 +1,9 @@
>> +[
>> + {
>> + "MetricExpr": "stall_slot_frontend / (slot * cpu_cycles)",
>> + "PublicDescription": "Frontend bound L1 topdown metric",
>> + "BriefDescription": "Frontend bound L1 topdown metric",
>> + "MetricGroup": "TopDownL1",
>> + "MetricName": "FRONTEND_BOUND"
>> + }
>> +]
>>
>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -0,0 +1,30 @@
>> +[
>> + {
>> + "ArchStdEvent": "FRONTEND_BOUND",
>> + "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
>> + }
>> +]
>>
>
> With the auto generation of metrics file I don't really see too much
> benefit of doing it this way.
>
> You also run into the issue where if a platform happens to define all of
> the events required by a metric, will that metric appear automatically,
> even if it's not valid?
>
Ok, I agree to put the topdown metric in the n2 metric instead of arch_std_event.
There is no unified formula for the topdown metric currently, and the slots of each
CPU may be different.
After the standard are pubulished in the future, please consider what John said, and
use the general metric as arch_std_event.
On 24/11/2022 16:32, Jing Zhang wrote:
>
>
> 在 2022/11/23 下午10:26, James Clark 写道:
>>
>>
>> On 22/11/2022 15:41, Jing Zhang wrote:
>>>
>>>
>>> 在 2022/11/22 下午10:00, James Clark 写道:
>>>>
>>>>
>>>> On 21/11/2022 17:55, John Garry wrote:
>>>>> On 21/11/2022 15:17, Jing Zhang wrote:
>>>>>> I'm sorry that I misunderstood the purpose of putting metric as
>>>>>> arch_std_event at first,
>>>>>> and now it works after the modification over your suggestion.
>>>>>>
>>>>>> But there are also a few questions:
>>>>>>
>>>>>> 1. The value of the slot in the topdownL1 is various in different
>>>>>> architectures, for example,
>>>>>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as
>>>>>> arch_std_event, then I need to
>>>>>> specify the slot to 5 in n2. I can specify slot values in metric like
>>>>>> below, but is there any
>>>>>> other concise way to do this?
>>>>>>
>>>>>> diff --git
>>>>>> a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>>> b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>>> index 8ff1dfe..b473baf 100644
>>>>>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>>> @@ -1,4 +1,23 @@
>>>>>> [
>>>>>> + {
>>>>>> + "MetricExpr": "5",
>>>>>> + "PublicDescription": "A pipeline slot represents the
>>>>>> hardware resources needed to process one uOp",
>>>>>> + "BriefDescription": "A pipeline slot represents the
>>>>>> hardware resources needed to process one uOp",
>>>>>> + "MetricName": "slot"
>>>>>
>>>>> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an
>>>>> opinion on this? It is possible to reuse metrics, so it should work, but...
>>>>>
>>>>> One problem is that "slot" would show up as a metric, which you would
>>>>> not want.
>>>>>
>>>>> Alternatively I was going to suggest that you can overwrite specific std
>>>>> arch event attributes. So for example of frontend_bound, you could have:
>>>>
>>>> I would agree with not having this and just hard coding the 5 wherever
>>>> it's needed. Once we have a few different sets of metrics in place maybe
>>>> we can start to look at deduplication, but for now I don't see the value.
>>>>
>>>>>
>>>>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>>>> @@ -0,0 +1,30 @@
>>>>> [
>>>>> {
>>>>> "ArchStdEvent": "FRONTEND_BOUND",
>>>>> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 *
>>>>> cpu_cycles)",
>>>>> },
>>>>>
>>>>>> + }
>>>>>> + {
>>>>>> + "ArchStdEvent": "FRONTEND_BOUND"
>>>>>> + },
>>>>>> + {
>>>>>> + "ArchStdEvent": "BACKEND_BOUND"
>>>>>> + },
>>>>>> + {
>>>>>> + "ArchStdEvent": "WASTED"
>>>>>> + },
>>>>>> + {
>>>>>> + "ArchStdEvent": "RETIRING"
>>>>>> + },
>>>>>>
>>>>>>
>>>>>> 2. Should I add the topdownL1 metric to
>>>>>> tools/perf/pmu-event/recommended.json,
>>>>>> or create a new json file to place the general metric?
>>>>>
>>>>> It would not belong in recommended.json as that is specifically for
>>>>> arch-recommended events. It would really just depend on where the value
>>>>> comes from, i.e. arm arm or sbsa.
>>>>>
>>>>
>>>> For what we're going to publish shortly we'll be generating a
>>>> metrics.json file for each CPU. It will be autogenerated so I don't
>>>> think duplication will be an issue and I'm expecting that there will be
>>>> differences in the topdown metrics between CPUs anyway. So I would also
>>>> vote to not put it in recommended.json
>>>>
>>>
>>> I will create a new sbsa.json file in tools/perf/pmu-events/arch/arm64/
>>> to place metrics that may be common between some CPUs, just like arch_std_event.
>>
>> Because this would apply to all CPUs rather than just N2, I still think
>> it's best to wait for our metrics repo to be published. Otherwise Arm
>> will start publishing metrics with names and group names for all future
>> CPUs that have different names to the common ones added as part of this
>> change.
>>
>> It's something that we've been working on for quite a while and we've
>> taken care to make sure that it applies to future products and is scalable.
>>
>> It would be easier to add these right now only for N2, and then
>> afterwards we can start to look at what is common and could be factored
>> out into the top level folder.
>>
>>> If the topdown metrics are different in other CPUs, we can overwrite the
>>> metric expression.
>>
>> True, but with different group names and metric names and units it could
>> get slightly complicated.
>>
>>>
>>> For example:
>>>
>>> +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
>>> @@ -0,0 +1,9 @@
>>> +[
>>> + {
>>> + "MetricExpr": "stall_slot_frontend / (slot * cpu_cycles)",
>>> + "PublicDescription": "Frontend bound L1 topdown metric",
>>> + "BriefDescription": "Frontend bound L1 topdown metric",
>>> + "MetricGroup": "TopDownL1",
>>> + "MetricName": "FRONTEND_BOUND"
>>> + }
>>> +]
>>>
>>> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>>> @@ -0,0 +1,30 @@
>>> +[
>>> + {
>>> + "ArchStdEvent": "FRONTEND_BOUND",
>>> + "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
>>> + }
>>> +]
>>>
>>
>> With the auto generation of metrics file I don't really see too much
>> benefit of doing it this way.
>>
>> You also run into the issue where if a platform happens to define all of
>> the events required by a metric, will that metric appear automatically,
>> even if it's not valid?
>>
>
> Ok, I agree to put the topdown metric in the n2 metric instead of arch_std_event.
> There is no unified formula for the topdown metric currently, and the slots of each
> CPU may be different.
>
> After the standard are pubulished in the future, please consider what John said, and
> use the general metric as arch_std_event.
Yep that sounds good, will do!
在 2022/11/22 上午1:55, John Garry 写道:
> On 21/11/2022 15:17, Jing Zhang wrote:
>> I'm sorry that I misunderstood the purpose of putting metric as arch_std_event at first,
>> and now it works after the modification over your suggestion.
>>
>> But there are also a few questions:
>>
>> 1. The value of the slot in the topdownL1 is various in different architectures, for example,
>> the slot is 5 on neoverse-n2. If I put topdownL1 metric as arch_std_event, then I need to
>> specify the slot to 5 in n2. I can specify slot values in metric like below, but is there any
>> other concise way to do this?
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> index 8ff1dfe..b473baf 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -1,4 +1,23 @@
>> [
>> + {
>> + "MetricExpr": "5",
>> + "PublicDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
>> + "BriefDescription": "A pipeline slot represents the hardware resources needed to process one uOp",
>> + "MetricName": "slot"
>
> Ehhh....I'm not sure if that is a good idea. Ian or anyone else have an opinion on this? It is possible to reuse metrics, so it should work, but...
>
> One problem is that "slot" would show up as a metric, which you would not want.
>
> Alternatively I was going to suggest that you can overwrite specific std arch event attributes. So for example of frontend_bound, you could have:
>
> + b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -0,0 +1,30 @@
> [
> {
> "ArchStdEvent": "FRONTEND_BOUND",
> "MetricExpr": "(stall_slot_frontend - cpu_cycles) / (5 * cpu_cycles)",
> },
>
>> + }
>> + {
>> + "ArchStdEvent": "FRONTEND_BOUND"
>> + },
>> + {
>> + "ArchStdEvent": "BACKEND_BOUND"
>> + },
>> + {
>> + "ArchStdEvent": "WASTED"
>> + },
>> + {
>> + "ArchStdEvent": "RETIRING"
>> + },
>>
>>
>> 2. Should I add the topdownL1 metric to tools/perf/pmu-event/recommended.json,
>> or create a new json file to place the general metric?
>
> It would not belong in recommended.json as that is specifically for arch-recommended events. It would really just depend on where the value comes from, i.e. arm arm or sbsa.
>
Thanks for your suggestion, I will send next patchset as you suggested.
Add TLB related metrics.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index 0048dfe..324ca12 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -26,5 +26,33 @@
"BriefDescription": "Backend Bound L1 topdown metric",
"MetricGroup": "TopDownL1",
"MetricName": "backend_bound"
+ },
+ {
+ "MetricExpr": "ITLB_WALK / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of TLB Walks per kilo instructions for instruction accesses",
+ "BriefDescription": "The rate of TLB Walks per kilo instructions for instruction accesses",
+ "MetricGroup": "TLB",
+ "MetricName": "itlb_mpki"
+ },
+ {
+ "MetricExpr": "ITLB_WALK / L1I_TLB",
+ "PublicDescription": "The rate of ITLB Walks to the overall TLB lookups initiated from the instruction side",
+ "BriefDescription": "The rate of ITLB Walks to the overall TLB lookups",
+ "MetricGroup": "TLB",
+ "MetricName": "itlb_walk_rate"
+ },
+ {
+ "MetricExpr": "DTLB_WALK / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of TLB Walks per kilo instructions for data accesses",
+ "BriefDescription": "The rate of TLB Walks per kilo instructions for data accesses",
+ "MetricGroup": "TLB",
+ "MetricName": "dtlb_mpki"
+ },
+ {
+ "MetricExpr": "DTLB_WALK / L1D_TLB",
+ "PublicDescription": "The rate of DTLB Walks to the overall TLB lookups made by the program",
+ "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
+ "MetricGroup": "TLB",
+ "MetricName": "dtlb_walk_rate"
}
]
\ No newline at end of file
--
1.8.3.1Add cache related metrics.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 77 ++++++++++++++++++++++
1 file changed, 77 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index 324ca12..1690ef6 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -54,5 +54,82 @@
"BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
"MetricGroup": "TLB",
"MetricName": "dtlb_walk_rate"
+ },
+ {
+ "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
+ "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
+ "MetricGroup": "Cache",
+ "MetricName": "l1i_cache_mpki"
+ },
+ {
+ "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
+ "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
+ "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
+ "MetricGroup": "Cache",
+ "MetricName": "l1i_cache_miss_rate"
+ },
+ {
+ "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
+ "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
+ "MetricGroup": "Cache",
+ "MetricName": "l1d_cache_mpki"
+ },
+ {
+ "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
+ "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
+ "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
+ "MetricGroup": "Cache",
+ "MetricName": "l1d_cache_miss_rate"
+ },
+ {
+ "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
+ "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
+ "MetricGroup": "Cache",
+ "MetricName": "l2d_cache_mpki"
+ },
+ {
+ "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
+ "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
+ "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
+ "MetricGroup": "Cache",
+ "MetricName": "l2d_cache_miss_rate"
+ },
+ {
+ "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
+ "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
+ "MetricGroup": "Cache",
+ "MetricName": "l3d_cache_mpki"
+ },
+ {
+ "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
+ "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
+ "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
+ "MetricGroup": "Cache",
+ "MetricName": "l3d_cache_miss_rate"
+ },
+ {
+ "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
+ "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
+ "MetricGroup": "Cache",
+ "MetricName": "ll_cache_read_mpki"
+ },
+ {
+ "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
+ "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
+ "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
+ "MetricGroup": "Cache",
+ "MetricName": "ll_cache_read_miss_rate"
+ },
+ {
+ "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
+ "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
+ "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
+ "MetricGroup": "Cache",
+ "MetricName": "ll_cache_read_hit_rate"
}
]
\ No newline at end of file
--
1.8.3.1
On 11/14/2022 3:41 PM, Jing Zhang wrote:
> Add cache related metrics.
>
> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
> ---
> .../arch/arm64/arm/neoverse-n2/metrics.json | 77 ++++++++++++++++++++++
> 1 file changed, 77 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> index 324ca12..1690ef6 100644
> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -54,5 +54,82 @@
> "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
> "MetricGroup": "TLB",
> "MetricName": "dtlb_walk_rate"
> + },
> + {
> + "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l1i_cache_mpki"
> + },
> + {
> + "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
> + "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
> + "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l1i_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l1d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
> + "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
> + "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l1d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l2d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
> + "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
> + "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l2d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l3d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
> + "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
> + "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l3d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
> + "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_mpki"
> + },
> + {
> + "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
> + "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
> + "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_miss_rate"
> + },
> + {
> + "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
> + "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
> + "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_hit_rate"
> }
> ]
> \ No newline at end of file
It is better to fix this by adding a newline at the end of the file.
--
Zhengjun Xing
在 2022/11/14 下午4:35, Xing Zhengjun 写道:
>
>
> On 11/14/2022 3:41 PM, Jing Zhang wrote:
>> Add cache related metrics.
>>
>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
>> ---
>> .../arch/arm64/arm/neoverse-n2/metrics.json | 77 ++++++++++++++++++++++
>> 1 file changed, 77 insertions(+)
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> index 324ca12..1690ef6 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -54,5 +54,82 @@
>> "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
>> "MetricGroup": "TLB",
>> "MetricName": "dtlb_walk_rate"
>> + },
>> + {
>> + "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
>> + "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> + "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l1i_cache_mpki"
>> + },
>> + {
>> + "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
>> + "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> + "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l1i_cache_miss_rate"
>> + },
>> + {
>> + "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
>> + "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> + "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l1d_cache_mpki"
>> + },
>> + {
>> + "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
>> + "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> + "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l1d_cache_miss_rate"
>> + },
>> + {
>> + "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
>> + "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> + "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l2d_cache_mpki"
>> + },
>> + {
>> + "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
>> + "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> + "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l2d_cache_miss_rate"
>> + },
>> + {
>> + "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
>> + "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> + "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l3d_cache_mpki"
>> + },
>> + {
>> + "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
>> + "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> + "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> + "MetricGroup": "Cache",
>> + "MetricName": "l3d_cache_miss_rate"
>> + },
>> + {
>> + "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
>> + "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
>> + "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
>> + "MetricGroup": "Cache",
>> + "MetricName": "ll_cache_read_mpki"
>> + },
>> + {
>> + "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
>> + "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> + "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> + "MetricGroup": "Cache",
>> + "MetricName": "ll_cache_read_miss_rate"
>> + },
>> + {
>> + "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
>> + "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> + "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> + "MetricGroup": "Cache",
>> + "MetricName": "ll_cache_read_hit_rate"
>> }
>> ]
>> \ No newline at end of file
>
> It is better to fix this by adding a newline at the end of the file.
>
OK, thanks for pointing it out.
Add branch related metrics.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index 1690ef6..e960a66 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -131,5 +131,26 @@
"BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
"MetricGroup": "Cache",
"MetricName": "ll_cache_read_hit_rate"
+ },
+ {
+ "MetricExpr": "BR_MIS_PRED / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of branches mis-predicted per kilo instructions",
+ "BriefDescription": "The rate of branches mis-predicted per kilo instructions",
+ "MetricGroup": "Branch",
+ "MetricName": "branch_mpki"
+ },
+ {
+ "MetricExpr": "(BR_PRED - BR_MIS_PRED) / INST_RETIRED * 1000",
+ "PublicDescription": "The rate of branches retired per kilo instructions",
+ "BriefDescription": "The rate of branches retired per kilo instructions",
+ "MetricGroup": "Branch",
+ "MetricName": "branch_pki"
+ },
+ {
+ "MetricExpr": "BR_MIS_PRED / BR_PRED",
+ "PublicDescription": "The rate of branches mis-predited to the overall branches",
+ "BriefDescription": "The rate of branches mis-predited to the overall branches",
+ "MetricGroup": "Branch",
+ "MetricName": "branch_miss_pred_rate"
}
]
\ No newline at end of file
--
1.8.3.1Add PE utilization related metrics.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index e960a66..3c14971 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -152,5 +152,33 @@
"BriefDescription": "The rate of branches mis-predited to the overall branches",
"MetricGroup": "Branch",
"MetricName": "branch_miss_pred_rate"
+ },
+ {
+ "MetricExpr": "instructions / CPU_CYCLES",
+ "PublicDescription": "The average number of instructions executed for each cycle.",
+ "BriefDescription": "Instructions per cycle",
+ "MetricGroup": "PEutilization",
+ "MetricName": "ipc"
+ },
+ {
+ "MetricExpr": "OP_RETIRED / OP_SPEC",
+ "PublicDescription": "Fraction of operations retired",
+ "BriefDescription": "Fraction of operations retired",
+ "MetricGroup": "PEutilization",
+ "MetricName": "retired_rate"
+ },
+ {
+ "MetricExpr": "1 - OP_RETIRED / OP_SPEC",
+ "PublicDescription": "Fraction of operations wasted",
+ "BriefDescription": "Fraction of operations wasted",
+ "MetricGroup": "PEutilization",
+ "MetricName": "wasted_rate"
+ },
+ {
+ "MetricExpr": "(1 - STALL_SLOT / (CPU_CYCLES * 5)) * OP_RETIRED / OP_SPEC",
+ "PublicDescription": "Utilization of CPU",
+ "BriefDescription": "Utilization of CPU",
+ "MetricGroup": "PEutilization",
+ "MetricName": "cpu_utilization"
}
]
\ No newline at end of file
--
1.8.3.1Add instruction mix related metrics.
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
.../arch/arm64/arm/neoverse-n2/metrics.json | 63 ++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
index 3c14971..8ff1dfe 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
@@ -180,5 +180,68 @@
"BriefDescription": "Utilization of CPU",
"MetricGroup": "PEutilization",
"MetricName": "cpu_utilization"
+ },
+ {
+ "MetricExpr": "LD_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of load instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of load instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "load_spec_rate"
+ },
+ {
+ "MetricExpr": "ST_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of store instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of store instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "store_spec_rate"
+ },
+ {
+ "MetricExpr": "DP_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of integer data-processing instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of integer data-processing instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "date_process_spec_rate"
+ },
+ {
+ "MetricExpr": "ASE_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of advanced SIMD instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of advanced SIMD instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "advanced_simd_spec_rate"
+ },
+ {
+ "MetricExpr": "VFP_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of floating point instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of floating point instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "float_point_spec_rate"
+ },
+ {
+ "MetricExpr": "CRYPTO_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of crypto instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of crypto instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "crypto_spec_rate"
+ },
+ {
+ "MetricExpr": "BR_IMMED_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of branch immediate instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of branch immediate instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "branch_immed_spec_rate"
+ },
+ {
+ "MetricExpr": "BR_RETURN_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of procedure return instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of procedure return instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "branch_return_spec_rate"
+ },
+ {
+ "MetricExpr": "BR_INDIRECT_SPEC / INST_SPEC",
+ "PublicDescription": "The rate of indirect branch instructions speculatively executed to overall instructions speclatively executed",
+ "BriefDescription": "The rate of indirect branch instructions speculatively executed to overall instructions speclatively executed",
+ "MetricGroup": "InstructionMix",
+ "MetricName": "branch_indirect_spec_rate"
}
]
\ No newline at end of file
--
1.8.3.1© 2016 - 2026 Red Hat, Inc.