Bring sink out of D3 (power down) mode into D0 (normal operation) mode
by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
patch will retry 3 times if written to DP_SET_POWER register failed.
Changes in v5:
-- split into two patches
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
---
drivers/gpu/drm/msm/dp/dp_link.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
index 9d5381d..4360728 100644
--- a/drivers/gpu/drm/msm/dp/dp_link.c
+++ b/drivers/gpu/drm/msm/dp/dp_link.c
@@ -50,6 +50,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
{
u8 value;
ssize_t len;
+ int i;
if (link->revision < 0x11)
return 0;
@@ -61,11 +62,13 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
value &= ~DP_SET_POWER_MASK;
value |= DP_SET_POWER_D0;
- len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
- if (len < 0)
- return len;
-
- usleep_range(1000, 2000);
+ /* retry for 1ms to give the sink time to wake up */
+ for (i = 0; i < 3; i++) {
+ len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
+ usleep_range(1000, 2000);
+ if (len == 1)
+ break;
+ }
return 0;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On 12/09/2022 19:23, Kuogee Hsieh wrote:
> Bring sink out of D3 (power down) mode into D0 (normal operation) mode
> by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
> patch will retry 3 times if written to DP_SET_POWER register failed.
Could you please elaborate this change? Can the sink succeed in reading
the DP_SET_POWER, but fail writing DP_SET_POWER?
>
> Changes in v5:
> -- split into two patches
>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
> ---
> drivers/gpu/drm/msm/dp/dp_link.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
> index 9d5381d..4360728 100644
> --- a/drivers/gpu/drm/msm/dp/dp_link.c
> +++ b/drivers/gpu/drm/msm/dp/dp_link.c
> @@ -50,6 +50,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
> {
> u8 value;
> ssize_t len;
> + int i;
>
> if (link->revision < 0x11)
> return 0;
> @@ -61,11 +62,13 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux,
> value &= ~DP_SET_POWER_MASK;
> value |= DP_SET_POWER_D0;
>
> - len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
> - if (len < 0)
> - return len;
> -
> - usleep_range(1000, 2000);
> + /* retry for 1ms to give the sink time to wake up */
> + for (i = 0; i < 3; i++) {
> + len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
> + usleep_range(1000, 2000);
> + if (len == 1)
> + break;
> + }
>
> return 0;
> }
--
With best wishes
Dmitry
On 9/12/2022 11:37 AM, Dmitry Baryshkov wrote:
> On 12/09/2022 19:23, Kuogee Hsieh wrote:
>> Bring sink out of D3 (power down) mode into D0 (normal operation) mode
>> by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
>> patch will retry 3 times if written to DP_SET_POWER register failed.
>
> Could you please elaborate this change? Can the sink succeed in
> reading the DP_SET_POWER, but fail writing DP_SET_POWER?
yes, there is possible since it is not only set local sink device but
also all downstream sink devices to D0 state.
>
>>
>> Changes in v5:
>> -- split into two patches
>>
>> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
>> ---
>> drivers/gpu/drm/msm/dp/dp_link.c | 13 ++++++++-----
>> 1 file changed, 8 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/dp/dp_link.c
>> b/drivers/gpu/drm/msm/dp/dp_link.c
>> index 9d5381d..4360728 100644
>> --- a/drivers/gpu/drm/msm/dp/dp_link.c
>> +++ b/drivers/gpu/drm/msm/dp/dp_link.c
>> @@ -50,6 +50,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux
>> *aux,
>> {
>> u8 value;
>> ssize_t len;
>> + int i;
>> if (link->revision < 0x11)
>> return 0;
>> @@ -61,11 +62,13 @@ static int dp_aux_link_power_up(struct drm_dp_aux
>> *aux,
>> value &= ~DP_SET_POWER_MASK;
>> value |= DP_SET_POWER_D0;
>> - len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
>> - if (len < 0)
>> - return len;
>> -
>> - usleep_range(1000, 2000);
>> + /* retry for 1ms to give the sink time to wake up */
>> + for (i = 0; i < 3; i++) {
>> + len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
>> + usleep_range(1000, 2000);
>> + if (len == 1)
>> + break;
>> + }
>> return 0;
>> }
>
On 12/09/2022 22:26, Kuogee Hsieh wrote:
>
> On 9/12/2022 11:37 AM, Dmitry Baryshkov wrote:
>> On 12/09/2022 19:23, Kuogee Hsieh wrote:
>>> Bring sink out of D3 (power down) mode into D0 (normal operation) mode
>>> by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
>>> patch will retry 3 times if written to DP_SET_POWER register failed.
>>
>> Could you please elaborate this change? Can the sink succeed in
>> reading the DP_SET_POWER, but fail writing DP_SET_POWER?
>
> yes, there is possible since it is not only set local sink device but
> also all downstream sink devices to D0 state.
Ack. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
>>
>>>
>>> Changes in v5:
>>> -- split into two patches
>>>
>>> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
>>> ---
>>> drivers/gpu/drm/msm/dp/dp_link.c | 13 ++++++++-----
>>> 1 file changed, 8 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/dp/dp_link.c
>>> b/drivers/gpu/drm/msm/dp/dp_link.c
>>> index 9d5381d..4360728 100644
>>> --- a/drivers/gpu/drm/msm/dp/dp_link.c
>>> +++ b/drivers/gpu/drm/msm/dp/dp_link.c
>>> @@ -50,6 +50,7 @@ static int dp_aux_link_power_up(struct drm_dp_aux
>>> *aux,
>>> {
>>> u8 value;
>>> ssize_t len;
>>> + int i;
>>> if (link->revision < 0x11)
>>> return 0;
>>> @@ -61,11 +62,13 @@ static int dp_aux_link_power_up(struct drm_dp_aux
>>> *aux,
>>> value &= ~DP_SET_POWER_MASK;
>>> value |= DP_SET_POWER_D0;
>>> - len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
>>> - if (len < 0)
>>> - return len;
>>> -
>>> - usleep_range(1000, 2000);
>>> + /* retry for 1ms to give the sink time to wake up */
>>> + for (i = 0; i < 3; i++) {
>>> + len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
>>> + usleep_range(1000, 2000);
>>> + if (len == 1)
>>> + break;
>>> + }
>>> return 0;
>>> }
>>
--
With best wishes
Dmitry
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