From: Michal Camacho Romero <michal.camacho.romero@intel.com>

Define DTPR related structures offsets.

Link: https://github.com/acpica/acpica/commit/c6fc16c8936d
Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
 include/acpi/actbl1.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 23449a068c5c..423e7232974a 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -37,6 +37,7 @@
 #define ACPI_SIG_DBGP           "DBGP"	/* Debug Port table */
 #define ACPI_SIG_DMAR           "DMAR"	/* DMA Remapping table */
 #define ACPI_SIG_DRTM           "DRTM"	/* Dynamic Root of Trust for Measurement table */
+#define ACPI_SIG_DTPR           "DTPR"	/* DMA TXT Protection Ranges table */
 #define ACPI_SIG_ECDT           "ECDT"	/* Embedded Controller Boot Resources Table */
 #define ACPI_SIG_EINJ           "EINJ"	/* Error Injection table */
 #define ACPI_SIG_ERST           "ERST"	/* Error Record Serialization Table */
@@ -47,7 +48,6 @@
 #define ACPI_SIG_HPET           "HPET"	/* High Precision Event Timer table */
 #define ACPI_SIG_IBFT           "IBFT"	/* iSCSI Boot Firmware Table */
 #define ACPI_SIG_MSCT           "MSCT"	/* Maximum System Characteristics Table */
-#define ACPI_SIG_DTPR           "DTPR"	/* TXT DMA Protection Ranges reporting table */
 
 #define ACPI_SIG_S3PT           "S3PT"	/* S3 Performance (sub)Table */
 #define ACPI_SIG_PCCS           "PCC"	/* PCC Shared Memory Region */
@@ -1994,7 +1994,7 @@ struct acpi_tpr_array {
 	u64 base;
 };
 
-struct acpi_dtpr_instance {
+struct acpi_tpr_instance {
 	u32 flags;
 	u32 tpr_cnt;
 	struct acpi_tpr_array tpr_array[];
@@ -2008,7 +2008,7 @@ struct acpi_dtpr_instance {
  * TPRn_LIMIT[63:20] * applied to the incoming address, to determine if an
  * access fall within the TPRn defined region.
 *******************************************************************************/
-struct acpi_dtprn_base_reg {
+struct acpi_tprn_base_reg {
 	u64 reserved0:3;
 	u64 rw:1;		// access: 1 == RO, 0 == RW (for TPR must be RW)
 	u64 enable:1;		// 0 == range enabled, 1 == range disabled
@@ -2030,7 +2030,7 @@ struct acpi_dtprn_base_reg {
  * transaction from changing the state of memory.
 *******************************************************************************/
 
-struct acpi_dtprn_limit_reg {
+struct acpi_tprn_limit_reg {
 	u64 reserved0:3;
 	u64 rw:1;		// access: 1 == RO, 0 == RW (for TPR must be RW)
 	u64 enable:1;		// 0 == range enabled, 1 == range disabled
-- 
2.51.0