This patch series is created based on [1] and the aim is to make Xen properly
works when SSTC extension is available.
It is needed to do in this way as OpenSBI doesn't pass that it supports SSTC
by DTS to Xen and there is no easy way to turn off support of SSTC support.
Also, as a part of this patch series intrdouce suggested [2] by Jan B.
improvements of init_csr_masks().
[1] https://lore.kernel.org/xen-devel/cover.1772814110.git.oleksii.kurochko@gmail.com/T/#mc14576ef43a83b344c5f31626005b995e2ccbeaa
[2] https://lore.kernel.org/xen-devel/cover.1772814110.git.oleksii.kurochko@gmail.com/T/#m9c18d2d7a98958befec16419f5deccc40f6c8c3e
CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2417456208
Also, I've manually ran QEMU with SSTC=on/off and built Xen with a newer RISC-V
compileer (in comparison with the version used by CI's docker container) to
verify CONFIG_CC_HAS_ASM_GOTO_OUTPUT branch inside csr_read_safe().
---
Changes in v2:
- Address the comments from ML.
---
Oleksii Kurochko (4):
xen/riscv: add exception table support
xen/riscv: add csr_allowed_read() helper
xen/riscv: allow Xen to use SSTC while hiding it from guests
xen/riscv: init_csr_masks()-related improvements
xen/arch/riscv/Kconfig | 1 +
xen/arch/riscv/Makefile | 1 +
xen/arch/riscv/cpufeature.c | 33 ++++++++
xen/arch/riscv/domain.c | 29 +++----
xen/arch/riscv/extable.c | 85 +++++++++++++++++++++
xen/arch/riscv/include/asm/bug.h | 2 +
xen/arch/riscv/include/asm/cpufeature.h | 1 +
xen/arch/riscv/include/asm/csr.h | 36 ++++++++-
xen/arch/riscv/include/asm/extable.h | 58 ++++++++++++++
xen/arch/riscv/include/asm/riscv_encoding.h | 2 +
xen/arch/riscv/setup.c | 3 +
xen/arch/riscv/time.c | 34 +++++----
xen/arch/riscv/traps.c | 5 ++
xen/arch/riscv/vtimer.c | 7 +-
xen/arch/riscv/xen.lds.S | 3 +
xen/arch/x86/xen.lds.S | 6 +-
xen/include/xen/xen.lds.h | 6 ++
17 files changed, 277 insertions(+), 35 deletions(-)
create mode 100644 xen/arch/riscv/extable.c
create mode 100644 xen/arch/riscv/include/asm/extable.h
--
2.53.0