The patch series is based on [introduce generic implementation
of macros from bug.h] which hasn't been commited yet.
The patch series provides a basic implementation of exception handling.
It can do only basic things such as decode a cause of an exception,
save/restore registers and execute "wfi" instruction if an exception
can not be handled.
To verify that exception handling works well it was implemented macros
from <asm/bug.h> such as BUG/WARN/run_in_exception/assert_failed.
The implementation of macros is used "ebreak" instruction and set up bug
frame tables for each type of macros.
Also it was implemented register save/restore to return and continue work
after WARN/run_in_exception.
Not all functionality of the macros was implemented as some of them
require hard-panic the system which is not available now. Instead of
hard-panic 'wfi' instruction is used but it should be definitely changed
in the neareset future.
It wasn't implemented show_execution_state() and stack trace discovering
as it's not necessary now.
---
Changes in V4:
- Rebase the patch series on top of new version of [introduce generic
implementation of macros from bug.h] patch series.
- Update the cover letter message as 'Early printk' was merged and
the current one patch series is based only on [introduce generic
implementation of macros from bug.h] which hasn't been commited yet.
- The following patches of the patch series were merged to staging:
[PATCH v3 01/14] xen/riscv: change ISA to r64G
[PATCH v3 02/14] xen/riscv: add <asm/asm.h> header
[PATCH v3 03/14] xen/riscv: add <asm/riscv_encoding.h header
[PATCH v3 04/14] xen/riscv: add <asm/csr.h> header
[PATCH v3 05/14] xen/riscv: introduce empty <asm/string.h>
[PATCH v3 06/14] xen/riscv: introduce empty <asm/cache.h>
[PATCH v3 07/14] xen/riscv: introduce exception context
[PATCH v3 08/14] xen/riscv: introduce exception handlers implementation
[PATCH v3 10/14] xen/riscv: mask all interrupts
- Fix addressed comments in xen-devel mailing list.
---
Changes in V3:
- Change the name of config RISCV_ISA_RV64IMA to RISCV_ISA_RV64G
as instructions from Zicsr and Zifencei extensions aren't part of
I extension any more.
- Rebase the patch "xen/riscv: introduce an implementation of macros
from <asm/bug.h>" on top of patch series [introduce generic implementation
of macros from bug.h]
- Update commit messages
---
Changes in V2:
- take the latest riscv_encoding.h from OpenSBI, update it with Xen
related changes, and update the commit message with "Origin:"
tag and the commit message itself.
- add "Origin:" tag to the commit messag of the patch
[xen/riscv: add <asm/csr.h> header].
- Remove the patch [xen/riscv: add early_printk_hnum() function] as the
functionality provided by the patch isn't used now.
- Refactor prcoess.h: move structure offset defines to asm-offsets.c,
change register_t to unsigned long.
- Refactor entry.S to use offsets defined in asm-offsets.C
- Rename {__,}handle_exception to handle_trap() and do_trap() to be more
consistent with RISC-V spec.
- Merge the pathc which introduces do_unexpected_trap() with the patch
[xen/riscv: introduce exception handlers implementation].
- Rename setup_trap_handler() to trap_init() and update correspondingly
the patches in the patch series.
- Refactor bug.h, remove bug_instr_t type from it.
- Refactor decode_trap_cause() function to be more optimization-friendly.
- Add two new empty headers: <cache.h> and <string.h> as they are needed to
include <xen/lib.h> which provides ARRAY_SIZE and other macros.
- Code style fixes.
---
Oleksii Kurochko (5):
xen/riscv: introduce decode_cause() stuff
xen/riscv: introduce trap_init()
xen/riscv: introduce an implementation of macros from <asm/bug.h>
xen/riscv: test basic handling stuff
automation: modify RISC-V smoke test
automation/scripts/qemu-smoke-riscv64.sh | 2 +-
xen/arch/riscv/include/asm/bug.h | 48 +++++
xen/arch/riscv/include/asm/processor.h | 2 +
xen/arch/riscv/include/asm/traps.h | 1 +
xen/arch/riscv/setup.c | 21 +++
xen/arch/riscv/traps.c | 219 ++++++++++++++++++++++-
xen/arch/riscv/xen.lds.S | 10 ++
7 files changed, 301 insertions(+), 2 deletions(-)
create mode 100644 xen/arch/riscv/include/asm/bug.h
--
2.39.0