arm/gicv3: Detect normal NC ITS command queues

[PATCH] arm/gicv3: Detect normal NC ITS command queues

Posted by Mykola Kvach 2 weeks, 1 day ago

From: Mykola Kvach <mykola_kvach@epam.com>

GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
Non-cacheable) describe non-cacheable accesses to the command queue.

its_map_cbaser() only checked whether the shifted field was zero,
so an ITS that reports Normal Inner Non-cacheable would not set
HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
the unshifted enum value, matching the handling of ITS BASER tables
and GICR_PROPBASER.

Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
---
 xen/arch/arm/gic-v3-its.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
index 9005ce8ce5..7560d46c6d 100644
--- a/xen/arch/arm/gic-v3-its.c
+++ b/xen/arch/arm/gic-v3-its.c
@@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its)
      * If the command queue memory is mapped as uncached, we need to flush
      * it on every access.
      */
-    if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) )
+    if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=
+         GIC_BASER_CACHE_nC )
     {
         its->flags |= HOST_ITS_FLUSH_CMD_QUEUE;
         printk(XENLOG_WARNING "using non-cacheable ITS command queue\n");
-- 
2.43.0

Re: [PATCH] arm/gicv3: Detect normal NC ITS command queues

Posted by Orzel, Michal 1 week, 5 days ago


On 15-May-26 11:40, Mykola Kvach wrote:
> From: Mykola Kvach <mykola_kvach@epam.com>
> 
> GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
> Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
> Non-cacheable) describe non-cacheable accesses to the command queue.
> 
> its_map_cbaser() only checked whether the shifted field was zero,
> so an ITS that reports Normal Inner Non-cacheable would not set
> HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
> the unshifted enum value, matching the handling of ITS BASER tables
> and GICR_PROPBASER.
> 
> Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
> Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>

~Michal

Re: [PATCH] arm/gicv3: Detect normal NC ITS command queues

Posted by Luca Fancellu 2 weeks ago

Hi Mykola,

> On 15 May 2026, at 10:40, Mykola Kvach <xakep.amatop@gmail.com> wrote:
> 
> From: Mykola Kvach <mykola_kvach@epam.com>
> 
> GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
> Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
> Non-cacheable) describe non-cacheable accesses to the command queue.
> 
> its_map_cbaser() only checked whether the shifted field was zero,
> so an ITS that reports Normal Inner Non-cacheable would not set
> HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
> the unshifted enum value, matching the handling of ITS BASER tables
> and GICR_PROPBASER.
> 
> Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
> Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
> ---
> xen/arch/arm/gic-v3-its.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
> index 9005ce8ce5..7560d46c6d 100644
> --- a/xen/arch/arm/gic-v3-its.c
> +++ b/xen/arch/arm/gic-v3-its.c
> @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its)
>      * If the command queue memory is mapped as uncached, we need to flush
>      * it on every access.
>      */
> -    if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) )
> +    if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=
> +         GIC_BASER_CACHE_nC )
>     {
>         its->flags |= HOST_ITS_FLUSH_CMD_QUEUE;
>         printk(XENLOG_WARNING "using non-cacheable ITS command queue\n");
> -- 
> 2.43.0
> 
> 

Looks ok to me

Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>

Cheers,
Luca

Re: [PATCH] arm/gicv3: Detect normal NC ITS command queues

Posted by Stefano Stabellini 2 weeks ago

Oleksii, can we have a release ack on this fix?

On Fri, 15 May 2026, Luca Fancellu wrote:
> Hi Mykola,
> 
> > On 15 May 2026, at 10:40, Mykola Kvach <xakep.amatop@gmail.com> wrote:
> > 
> > From: Mykola Kvach <mykola_kvach@epam.com>
> > 
> > GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
> > Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
> > Non-cacheable) describe non-cacheable accesses to the command queue.
> > 
> > its_map_cbaser() only checked whether the shifted field was zero,
> > so an ITS that reports Normal Inner Non-cacheable would not set
> > HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
> > the unshifted enum value, matching the handling of ITS BASER tables
> > and GICR_PROPBASER.
> > 
> > Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
> > Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
> > ---
> > xen/arch/arm/gic-v3-its.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
> > index 9005ce8ce5..7560d46c6d 100644
> > --- a/xen/arch/arm/gic-v3-its.c
> > +++ b/xen/arch/arm/gic-v3-its.c
> > @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its)
> >      * If the command queue memory is mapped as uncached, we need to flush
> >      * it on every access.
> >      */
> > -    if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) )
> > +    if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=
> > +         GIC_BASER_CACHE_nC )
> >     {
> >         its->flags |= HOST_ITS_FLUSH_CMD_QUEUE;
> >         printk(XENLOG_WARNING "using non-cacheable ITS command queue\n");
> > -- 
> > 2.43.0
> > 
> > 
> 
> Looks ok to me
> 
> Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>

Re: [PATCH] arm/gicv3: Detect normal NC ITS command queues

Posted by Oleksii Kurochko 1 week, 4 days ago


On 5/15/26 11:35 PM, Stefano Stabellini wrote:
> Oleksii, can we have a release ack on this fix?

Sure, fixes could go until Hard Code freeze is started.

Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

> 
> On Fri, 15 May 2026, Luca Fancellu wrote:
>> Hi Mykola,
>>
>>> On 15 May 2026, at 10:40, Mykola Kvach <xakep.amatop@gmail.com> wrote:
>>>
>>> From: Mykola Kvach <mykola_kvach@epam.com>
>>>
>>> GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding.
>>> Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner
>>> Non-cacheable) describe non-cacheable accesses to the command queue.
>>>
>>> its_map_cbaser() only checked whether the shifted field was zero,
>>> so an ITS that reports Normal Inner Non-cacheable would not set
>>> HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with
>>> the unshifted enum value, matching the handling of ITS BASER tables
>>> and GICR_PROPBASER.
>>>
>>> Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer")
>>> Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
>>> ---
>>> xen/arch/arm/gic-v3-its.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
>>> index 9005ce8ce5..7560d46c6d 100644
>>> --- a/xen/arch/arm/gic-v3-its.c
>>> +++ b/xen/arch/arm/gic-v3-its.c
>>> @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its)
>>>       * If the command queue memory is mapped as uncached, we need to flush
>>>       * it on every access.
>>>       */
>>> -    if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) )
>>> +    if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=
>>> +         GIC_BASER_CACHE_nC )
>>>      {
>>>          its->flags |= HOST_ITS_FLUSH_CMD_QUEUE;
>>>          printk(XENLOG_WARNING "using non-cacheable ITS command queue\n");
>>> -- 
>>> 2.43.0
>>>
>>>
>>
>> Looks ok to me
>>
>> Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
>