These are 32bit CPUs only. 64bit support started with model 4 (Prescott-256).
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Julian Vetter <julian.vetter@vates.tech>
CC: Teddy Astie <teddy.astie@vates.tech>
CC: Kevin Lampis <kevin.lampis@citrix.com>
This ideally wants backporting to 4.20 along with the rest of the VFM cleanup
in order to support DMR/NVL, which ends with removing the x86_ prefixed names.
---
xen/arch/x86/cpu/intel.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index d585161dd32f..eec6ee763040 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -335,11 +335,6 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE)
printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n");
- /* CPUID workaround for Intel 0F33/0F34 CPU */
- if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
- (boot_cpu_data.x86_mask == 3 || boot_cpu_data.x86_mask == 4))
- paddr_bits = 36;
-
if (c == &boot_cpu_data) {
uint64_t misc_enable;
--
2.39.5