The ESP FIFO is used as a buffer for DMA requests and so isn't guaranteed to
be empty in the case of SCSI errors or a mixed DMA/non-DMA request. Flush the
FIFO before sending a SCSI command to guarantee that it is correctly
positioned at the start of the FIFO.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
src/hw/esp-scsi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/hw/esp-scsi.c b/src/hw/esp-scsi.c
index cc25f22..e4815aa 100644
--- a/src/hw/esp-scsi.c
+++ b/src/hw/esp-scsi.c
@@ -46,6 +46,7 @@
#define ESP_DMA_WMAC 0x58c
#define ESP_CMD_DMA 0x80
+#define ESP_CMD_FLUSH 0x01
#define ESP_CMD_RESET 0x02
#define ESP_CMD_TI 0x10
#define ESP_CMD_ICCS 0x11
@@ -96,6 +97,9 @@ esp_scsi_process_op(struct disk_op_s *op)
outb(target, iobase + ESP_WBUSID);
+ /* Clear FIFO before sending command. */
+ outb(ESP_CMD_FLUSH, iobase + ESP_CMD);
+
/*
* We need to pass the LUN at the beginning of the command, and the FIFO
* is only 16 bytes, so we cannot support 16-byte CDBs. The alternative
--
2.39.2
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