[v2] target/riscv: Fix no-TCG build

[PATCH v2 0/5] target/riscv: Fix no-TCG build

Zephyr Li posted 5 patches 4 days, 5 hours ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1779792111.git.fritchleybohrer@gmail.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu.zevorn@gmail.com>

target/riscv/cpu.c         |  8 +++++-
target/riscv/cpu_helper.c  | 53 ++++++++++++++++++++++++++++++++++++++
target/riscv/csr.c         | 11 ++++++--
target/riscv/fpu_helper.c  | 27 -------------------
target/riscv/meson.build   |  9 ++++---
target/riscv/op_helper.c   | 15 -----------
target/riscv/tcg/tcg-cpu.h | 10 +++++++
7 files changed, 85 insertions(+), 48 deletions(-)

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[PATCH v2 0/5] target/riscv: Fix no-TCG build

Posted by Zephyr Li 4 days, 5 hours ago

This series fixes the riscv64-softmmu --disable-tcg build by keeping
TCG-only files and code out of no-TCG builds, while keeping common
helpers available for non-TCG configurations.

The first patches move common helpers out of TCG-only helper files. The
later patches reject x-misa-w when TCG is unavailable, provide a no-TCG
stub for riscv_cpu_validate_set_extensions(), and build RISC-V TCG-only
sources only when TCG is enabled.

Changes in v2:
- Split the original patch into smaller logical patches.
- Drop the unused tcg/tcg.h include.
- Add a no-TCG stub for riscv_cpu_validate_set_extensions().
- Keep x-misa-w rejected during CPU realize when TCG is unavailable.

Testing:
- riscv64-softmmu --enable-kvm --disable-tcg --enable-debug builds
  successfully.
- riscv64-softmmu --enable-debug builds successfully.
- qemu-system-riscv64 -M virt,accel=qtest -cpu rv64,x-misa-w=true \
  -S -nographic reports "x-misa-w requires TCG".

Zephyr Li (5):
  target/riscv: Remove unused tcg/tcg.h include
  target/riscv: Move fflags helpers to common code
  target/riscv: Move riscv_raise_exception() to common code
  target/riscv: Reject x-misa-w without TCG
  target/riscv: Build TCG-only code only with TCG

 target/riscv/cpu.c         |  8 +++++-
 target/riscv/cpu_helper.c  | 53 ++++++++++++++++++++++++++++++++++++++
 target/riscv/csr.c         | 11 ++++++--
 target/riscv/fpu_helper.c  | 27 -------------------
 target/riscv/meson.build   |  9 ++++---
 target/riscv/op_helper.c   | 15 -----------
 target/riscv/tcg/tcg-cpu.h | 10 +++++++
 7 files changed, 85 insertions(+), 48 deletions(-)

-- 
2.43.0

Re: [PATCH v2 0/5] target/riscv: Fix no-TCG build

Posted by Philippe Mathieu-Daudé 4 days, 4 hours ago

On 26/5/26 13:04, Zephyr Li wrote:
> This series fixes the riscv64-softmmu --disable-tcg build by keeping
> TCG-only files and code out of no-TCG builds, while keeping common
> helpers available for non-TCG configurations.
> 
> The first patches move common helpers out of TCG-only helper files. The
> later patches reject x-misa-w when TCG is unavailable, provide a no-TCG
> stub for riscv_cpu_validate_set_extensions(), and build RISC-V TCG-only
> sources only when TCG is enabled.
> 
> Changes in v2:
> - Split the original patch into smaller logical patches.
> - Drop the unused tcg/tcg.h include.
> - Add a no-TCG stub for riscv_cpu_validate_set_extensions().
> - Keep x-misa-w rejected during CPU realize when TCG is unavailable.
> 
> Testing:
> - riscv64-softmmu --enable-kvm --disable-tcg --enable-debug builds
>    successfully.

To complete this effort we need to add coverage. See the last patch
of this series (which was unfortunately not merged back then):
https://lore.kernel.org/qemu-devel/20230711121453.59138-17-philmd@linaro.org/

> - riscv64-softmmu --enable-debug builds successfully.
> - qemu-system-riscv64 -M virt,accel=qtest -cpu rv64,x-misa-w=true \
>    -S -nographic reports "x-misa-w requires TCG".
> 
> Zephyr Li (5):
>    target/riscv: Remove unused tcg/tcg.h include
>    target/riscv: Move fflags helpers to common code
>    target/riscv: Move riscv_raise_exception() to common code
>    target/riscv: Reject x-misa-w without TCG
>    target/riscv: Build TCG-only code only with TCG
> 
>   target/riscv/cpu.c         |  8 +++++-
>   target/riscv/cpu_helper.c  | 53 ++++++++++++++++++++++++++++++++++++++
>   target/riscv/csr.c         | 11 ++++++--
>   target/riscv/fpu_helper.c  | 27 -------------------
>   target/riscv/meson.build   |  9 ++++---
>   target/riscv/op_helper.c   | 15 -----------
>   target/riscv/tcg/tcg-cpu.h | 10 +++++++
>   7 files changed, 85 insertions(+), 48 deletions(-)
>