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Tue, 26 May 2026 04:05:12 -0700 (PDT) From: Zephyr Li To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com, daniel.barboza@oss.qualcomm.com Subject: [PATCH v2 1/5] target/riscv: Remove unused tcg/tcg.h include Date: Tue, 26 May 2026 19:04:46 +0800 Message-ID: <32c6c8ac5e0eb7a8da660054bb9e59ddfc154e25.1779792111.git.fritchleybohrer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1241; envelope-from=fritchleybohrer@gmail.com; helo=mail-dl1-x1241.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779793592551154100 Content-Type: text/plain; charset="utf-8" Signed-off-by: Zephyr Li Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 862834b480..1dea66972d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -36,7 +36,6 @@ #include "system/tcg.h" #include "kvm/kvm_riscv.h" #include "tcg/tcg-cpu.h" -#include "tcg/tcg.h" =20 /* RISC-V CPU definitions */ static const char riscv_single_letter_exts[] =3D "IEMAFDQCBPVH"; --=20 2.43.0 From nobody Sat May 30 17:43:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779793525; cv=none; d=zohomail.com; s=zohoarc; b=BDxqF68Lbi4of75o8ZKmZuP9NUMLIaqYKIhA/aR2bASTNz8eGA8ApW6QL4fZHvEyXaJKCPDhuTRM2k4Pca2aiL3F2mKpgzOEHkSsFovEAzr/+XYtKM7eTxyBFiNvFwLPmCpfZ1ITUTOEEYjteTt0Hn7fh4vuBtvFy6/SUNcjuRk= ARC-Message-Signature: i=1; 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FPEXC_NX : 0; + hard |=3D (soft & float_flag_underflow) ? FPEXC_UF : 0; + hard |=3D (soft & float_flag_overflow) ? FPEXC_OF : 0; + hard |=3D (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; + hard |=3D (soft & float_flag_invalid) ? FPEXC_NV : 0; + + return hard; +} + +void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard) +{ + int soft =3D 0; + + soft |=3D (hard & FPEXC_NX) ? float_flag_inexact : 0; + soft |=3D (hard & FPEXC_UF) ? float_flag_underflow : 0; + soft |=3D (hard & FPEXC_OF) ? float_flag_overflow : 0; + soft |=3D (hard & FPEXC_DZ) ? float_flag_divbyzero : 0; + soft |=3D (hard & FPEXC_NV) ? float_flag_invalid : 0; + + set_float_exception_flags(soft, &env->fp_status); +} + int riscv_env_mmu_index(CPURISCVState *env, bool ifetch) { #ifdef CONFIG_USER_ONLY diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index af40561b31..eec6328281 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -23,33 +23,6 @@ #include "fpu/softfloat.h" #include "internals.h" =20 -target_ulong riscv_cpu_get_fflags(CPURISCVState *env) -{ - int soft =3D get_float_exception_flags(&env->fp_status); - target_ulong hard =3D 0; - - hard |=3D (soft & float_flag_inexact) ? FPEXC_NX : 0; - hard |=3D (soft & float_flag_underflow) ? FPEXC_UF : 0; - hard |=3D (soft & float_flag_overflow) ? FPEXC_OF : 0; - hard |=3D (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; - hard |=3D (soft & float_flag_invalid) ? FPEXC_NV : 0; - - return hard; -} - -void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard) -{ - int soft =3D 0; - - soft |=3D (hard & FPEXC_NX) ? float_flag_inexact : 0; - soft |=3D (hard & FPEXC_UF) ? float_flag_underflow : 0; - soft |=3D (hard & FPEXC_OF) ? float_flag_overflow : 0; - soft |=3D (hard & FPEXC_DZ) ? float_flag_divbyzero : 0; - soft |=3D (hard & FPEXC_NV) ? float_flag_invalid : 0; - - set_float_exception_flags(soft, &env->fp_status); -} - void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm) { int softrm; --=20 2.43.0 From nobody Sat May 30 17:43:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779793541; cv=none; d=zohomail.com; s=zohoarc; b=iuhvJSvYJdV4y+6n3QG4VUsDSUgtMmvfoiNI2HHJBaUTK3pILSokgI7xGg9HLP+ZrLjnbJff87LwFCBtgwCRx+JTFHLgr2MUzCKi/lkojDtyzKe5fpkehnX1EAOMmePxgxLg6v5pKf7bJ7XeKg9QPn3TMGcJw89YxZjJak2u3nE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779793541; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HZ2SEKYQIUrZHs3Nx+7QeMR2uW/p7CVSETlES67ZrAA=; b=mZnEKk11k4Zgi3YOTAc84Z7htnxzg9MLz9zgOhGZTSPoLEto+4FoKyuSX8wS3rvlPiROgl4c7usMT7xz5urpBOT8mmQiR3TysTcoOOQpT1lFJN8uQ3MhXOyT3Tbt3o1WXNmsB2wtlXb4DhiicXUWhL1kN2VgvoBh8Tn6AbLWZZg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1779793541025530.3101526766554; Tue, 26 May 2026 04:05:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wRpbB-0007MZ-Io; Tue, 26 May 2026 07:05:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wRpbA-0007Dz-19 for qemu-devel@nongnu.org; Tue, 26 May 2026 07:05:24 -0400 Received: from mail-dy1-x1344.google.com ([2607:f8b0:4864:20::1344]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1wRpb8-0008Cq-93 for qemu-devel@nongnu.org; Tue, 26 May 2026 07:05:23 -0400 Received: by mail-dy1-x1344.google.com with SMTP id 5a478bee46e88-3042a388168so3124758eec.1 for ; Tue, 26 May 2026 04:05:21 -0700 (PDT) Received: from openkylin.. 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Tue, 26 May 2026 04:05:20 -0700 (PDT) From: Zephyr Li To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com, daniel.barboza@oss.qualcomm.com Subject: [PATCH v2 3/5] target/riscv: Move riscv_raise_exception() to common code Date: Tue, 26 May 2026 19:04:48 +0800 Message-ID: <79175d7516dd98709c9703feca3ef0bc7b9e6b86.1779792111.git.fritchleybohrer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1344; envelope-from=fritchleybohrer@gmail.com; helo=mail-dy1-x1344.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779793543080158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Zephyr Li --- target/riscv/cpu_helper.c | 19 +++++++++++++++++++ target/riscv/op_helper.c | 15 --------------- 2 files changed, 19 insertions(+), 15 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 678c106ae5..752752d520 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -39,6 +39,25 @@ #include "pmp.h" #include "qemu/plugin.h" =20 +/* Exceptions processing helpers */ +G_NORETURN void riscv_raise_exception(CPURISCVState *env, + RISCVException exception, + uintptr_t pc) +{ + CPUState *cs =3D env_cpu(env); + + trace_riscv_exception(exception, + riscv_cpu_get_trap_name(exception, false), + env->pc); + + cs->exception_index =3D exception; +#ifdef CONFIG_TCG + cpu_loop_exit_restore(cs, pc); +#else + qemu_build_not_reached(); +#endif +} + target_ulong riscv_cpu_get_fflags(CPURISCVState *env) { int soft =3D get_float_exception_flags(&env->fp_status); diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 81873014cb..d17a8bbf10 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -28,21 +28,6 @@ #include "exec/tlb-flags.h" #include "trace.h" =20 -/* Exceptions processing helpers */ -G_NORETURN void riscv_raise_exception(CPURISCVState *env, - RISCVException exception, - uintptr_t pc) -{ - CPUState *cs =3D env_cpu(env); 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Tue, 26 May 2026 04:05:24 -0700 (PDT) From: Zephyr Li To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com, daniel.barboza@oss.qualcomm.com Subject: [PATCH v2 4/5] target/riscv: Reject x-misa-w without TCG Date: Tue, 26 May 2026 19:04:49 +0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1242; envelope-from=fritchleybohrer@gmail.com; helo=mail-dl1-x1242.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779793553109158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Zephyr Li --- target/riscv/cpu.c | 7 +++++++ target/riscv/tcg/tcg-cpu.h | 10 ++++++++++ 2 files changed, 17 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1dea66972d..8f54610097 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -955,6 +955,13 @@ static void riscv_cpu_realize(DeviceState *dev, Error = **errp) RISCVCPUClass *mcc =3D RISCV_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 +#ifndef CONFIG_TCG + if (cpu->cfg.misa_w) { + error_setg(errp, "x-misa-w requires TCG"); + return; + } +#endif + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); diff --git a/target/riscv/tcg/tcg-cpu.h b/target/riscv/tcg/tcg-cpu.h index a23716a5ac..20ad294f88 100644 --- a/target/riscv/tcg/tcg-cpu.h +++ b/target/riscv/tcg/tcg-cpu.h @@ -22,7 +22,17 @@ =20 #include "cpu.h" =20 +#ifdef CONFIG_TCG void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp); +#else +static inline void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, + Error **errp) +{ + (void)cpu; + (void)errp; + qemu_build_not_reached(); +} +#endif void riscv_tcg_cpu_finalize_features(RISCVCPU *cpu, Error **errp); bool riscv_cpu_tcg_compatible(RISCVCPU *cpu); =20 --=20 2.43.0 From nobody Sat May 30 17:43:43 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1779793597; cv=none; d=zohomail.com; s=zohoarc; b=htNajeqyCxwbU2sy/DvlypxarnEA5yjnAgopY03jJzNIBLpZTrFpesU70kPxs9FEhfJQdZ3KTR41XcYJI96PCenS9v69PW+XcATnVdD2bO0PDzLEx3zAG9rVm1LtHY9I9d8UilSD7WV0rL0rRFPw/FGPmhHWXEBebe1KYn+Jesw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1779793597; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Tue, 26 May 2026 04:05:29 -0700 (PDT) From: Zephyr Li To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com, daniel.barboza@oss.qualcomm.com Subject: [PATCH v2 5/5] target/riscv: Build TCG-only code only with TCG Date: Tue, 26 May 2026 19:04:50 +0800 Message-ID: <40b4ddf2925bf82413b06020325bac73f78bd42c.1779792111.git.fritchleybohrer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1242; envelope-from=fritchleybohrer@gmail.com; helo=mail-dl1-x1242.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1779793600744154100 Content-Type: text/plain; charset="utf-8" Signed-off-by: Zephyr Li --- target/riscv/cpu_helper.c | 6 ++++++ target/riscv/csr.c | 11 +++++++++-- target/riscv/meson.build | 9 ++++++--- 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 752752d520..e53a5d567d 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -29,8 +29,10 @@ #include "exec/target_page.h" #include "system/memory.h" #include "instmap.h" +#ifdef CONFIG_TCG #include "tcg/tcg-op.h" #include "accel/tcg/cpu-ops.h" +#endif #include "trace.h" #include "semihosting/common-semi.h" #include "exec/icount.h" @@ -1714,6 +1716,7 @@ static int get_physical_address(CPURISCVState *env, h= waddr *physical, return TRANSLATE_SUCCESS; } =20 +#ifdef CONFIG_TCG static void raise_mmu_exception(CPURISCVState *env, target_ulong address, MMUAccessType access_type, bool pmp_violat= ion, bool first_stage, bool two_stage, @@ -1756,6 +1759,7 @@ static void raise_mmu_exception(CPURISCVState *env, t= arget_ulong address, env->two_stage_lookup =3D two_stage; env->two_stage_indirect_lookup =3D two_stage_indirect; } +#endif =20 hwaddr riscv_cpu_get_phys_addr_debug(CPUState *cs, vaddr addr) { @@ -1780,6 +1784,7 @@ hwaddr riscv_cpu_get_phys_addr_debug(CPUState *cs, va= ddr addr) return phys_addr; } =20 +#ifdef CONFIG_TCG void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, @@ -2004,6 +2009,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, = int size, =20 return true; } +#endif =20 static target_ulong riscv_transformed_insn(CPURISCVState *env, target_ulong insn, diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 5514e0f455..df5dff2c11 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2135,15 +2135,22 @@ static RISCVException read_misa(CPURISCVState *env,= int csrno, =20 static target_ulong get_next_pc(CPURISCVState *env, uintptr_t ra) { + /* Outside of a running cpu, env contains the next pc. */ + if (ra =3D=3D 0) { + return env->pc; + } +#ifdef CONFIG_TCG uint64_t data[INSN_START_WORDS]; =20 - /* Outside of a running cpu, env contains the next pc. */ - if (ra =3D=3D 0 || !cpu_unwind_state_data(env_cpu(env), ra, data)) { + if (!cpu_unwind_state_data(env_cpu(env), ra, data)) { return env->pc; } =20 /* Within unwind data, [0] is pc and [1] is the opcode. */ return data[0] + insn_len(data[1]); +#else + qemu_build_not_reached(); +#endif } =20 static RISCVException write_misa(CPURISCVState *env, int csrno, diff --git a/target/riscv/meson.build b/target/riscv/meson.build index 79f36abd63..c2b2f61ad9 100644 --- a/target/riscv/meson.build +++ b/target/riscv/meson.build @@ -9,7 +9,7 @@ gen =3D [ ] =20 riscv_ss =3D ss.source_set() -riscv_ss.add(gen) +riscv_ss.add(when: 'CONFIG_TCG', if_true: gen) =20 riscv_ss.add(when: 'CONFIG_ARM_COMPATIBLE_SEMIHOSTING', if_true: files('common-semi-target.c')) @@ -18,11 +18,14 @@ riscv_ss.add(files( 'cpu.c', 'cpu_helper.c', 'csr.c', - 'fpu_helper.c', 'gdbstub.c', + 'vector_internals.c', +)) + +riscv_ss.add(when: 'CONFIG_TCG', if_true: files( + 'fpu_helper.c', 'op_helper.c', 'vector_helper.c', - 'vector_internals.c', 'bitmanip_helper.c', 'translate.c', 'm128_helper.c', --=20 2.43.0