[PATCH v0 0/1] fix the way riscv_plic_hart_config_string()

Chao Liu posted 1 patch 9 months, 4 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1744709888.git.lc00631@tecorigin.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
hw/riscv/boot.c            | 4 ++--
hw/riscv/microchip_pfsoc.c | 2 +-
hw/riscv/riscv_hart.c      | 1 +
hw/riscv/sifive_u.c        | 5 +++--
hw/riscv/virt.c            | 2 +-
include/hw/riscv/boot.h    | 2 +-
6 files changed, 9 insertions(+), 7 deletions(-)
[PATCH v0 0/1] fix the way riscv_plic_hart_config_string()
Posted by Chao Liu 9 months, 4 weeks ago
Hi, all:

When I was configuring multiple sockets using riscv virt Machine, I found that
I could not set the PLIC correctly.

By checking the code, I found that it was due to not traversing the CPUState
correctly in the riscv_plic_hart_config_string() function.

So I tried to fix this.

--
Regards,
Chao

Chao Liu (1):
  hw/riscv: fix PLIC hart topology configuration string when not getting
    CPUState correctly

 hw/riscv/boot.c            | 4 ++--
 hw/riscv/microchip_pfsoc.c | 2 +-
 hw/riscv/riscv_hart.c      | 1 +
 hw/riscv/sifive_u.c        | 5 +++--
 hw/riscv/virt.c            | 2 +-
 include/hw/riscv/boot.h    | 2 +-
 6 files changed, 9 insertions(+), 7 deletions(-)

-- 
2.48.1