[v1] Add vtype.vill FIELD macro definition

[PATCH v1 0/1] Add vtype.vill FIELD macro definition

Chao Liu posted 1 patch 1 year, 1 month ago

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Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

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target/riscv/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

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[PATCH v1 0/1] Add vtype.vill FIELD macro definition

Posted by Chao Liu 1 year, 1 month ago

Hi, all:

According to the "The RISC-V Instruction Set Manual Volume I: Unprivileged
Architecture" Version 20240411, Section 31.3.4 "Vector type register, vtype",
and Table 40 "vtype register layout", this patch adds the definition for the
vill field of the vtype register. The bit position for vill is [63].

This change ensures that our implementation remains in line with the latest
RISC-V specifications, thereby maintaining compatibility and correctness.

Chao Liu (1):
  target/riscv: add VILL field for vtype register macro definition

 target/riscv/cpu.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

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2.47.0