[v2] Allow loading a no MMU kernel

[PATCH v2 0/4] Allow loading a no MMU kernel

Alistair Francis posted 4 patches 3 years, 6 months ago

Diff against v1
Download series mbox

Test checkpatch passed

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/cover.1602634524.git.alistair.francis@wdc.com

Maintainers: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <Alistair.Francis@wdc.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>

include/hw/riscv/boot.h     | 13 ++++++---
include/hw/riscv/sifive_u.h |  1 +
hw/riscv/boot.c             | 56 ++++++++++++++++++++++++++-----------
hw/riscv/opentitan.c        |  3 +-
hw/riscv/sifive_e.c         |  3 +-
hw/riscv/sifive_u.c         | 28 ++++++++++++++-----
hw/riscv/spike.c            | 11 ++++++--
hw/riscv/virt.c             | 11 ++++++--
8 files changed, 91 insertions(+), 35 deletions(-)

Expand all Fold all

[PATCH v2 0/4] Allow loading a no MMU kernel

Posted by Alistair Francis 3 years, 6 months ago

This series allows loading a noMMU kernel using the -kernel option.
Currently if using -kernel QEMU assumes you also have firmware and loads
the kernel at a hardcoded offset. This series changes that so we only
load the kernel at an offset if a firmware (-bios) was loaded.

This series also adds a function to check if the CPU is 32-bit. This is
a step towards running 32-bit and 64-bit CPUs on the 64-bit RISC-V build
by using run time checks instead of compile time checks. We also allow
the user to sepcify a CPU for the sifive_u machine.

Alistair Francis (4):
  hw/riscv: sifive_u: Allow specifying the CPU
  hw/riscv: Return the end address of the loaded firmware
  hw/riscv: Add a riscv_is_32_bit() function
  hw/riscv: Load the kernel after the firmware

 include/hw/riscv/boot.h     | 13 ++++++---
 include/hw/riscv/sifive_u.h |  1 +
 hw/riscv/boot.c             | 56 ++++++++++++++++++++++++++-----------
 hw/riscv/opentitan.c        |  3 +-
 hw/riscv/sifive_e.c         |  3 +-
 hw/riscv/sifive_u.c         | 28 ++++++++++++++-----
 hw/riscv/spike.c            | 11 ++++++--
 hw/riscv/virt.c             | 11 ++++++--
 8 files changed, 91 insertions(+), 35 deletions(-)

-- 
2.28.0

Re: [PATCH v2 0/4] Allow loading a no MMU kernel

Posted by Alistair Francis 3 years, 6 months ago

On Tue, Oct 13, 2020 at 5:28 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> This series allows loading a noMMU kernel using the -kernel option.
> Currently if using -kernel QEMU assumes you also have firmware and loads
> the kernel at a hardcoded offset. This series changes that so we only
> load the kernel at an offset if a firmware (-bios) was loaded.
>
> This series also adds a function to check if the CPU is 32-bit. This is
> a step towards running 32-bit and 64-bit CPUs on the 64-bit RISC-V build
> by using run time checks instead of compile time checks. We also allow
> the user to sepcify a CPU for the sifive_u machine.
>
> Alistair Francis (4):
>   hw/riscv: sifive_u: Allow specifying the CPU
>   hw/riscv: Return the end address of the loaded firmware
>   hw/riscv: Add a riscv_is_32_bit() function
>   hw/riscv: Load the kernel after the firmware

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  include/hw/riscv/boot.h     | 13 ++++++---
>  include/hw/riscv/sifive_u.h |  1 +
>  hw/riscv/boot.c             | 56 ++++++++++++++++++++++++++-----------
>  hw/riscv/opentitan.c        |  3 +-
>  hw/riscv/sifive_e.c         |  3 +-
>  hw/riscv/sifive_u.c         | 28 ++++++++++++++-----
>  hw/riscv/spike.c            | 11 ++++++--
>  hw/riscv/virt.c             | 11 ++++++--
>  8 files changed, 91 insertions(+), 35 deletions(-)
>
> --
> 2.28.0
>