1. Patchew
  2. QEMU
  3. [PATCH v1 0/6] RISC-V: Add more machine memory
  4. View patch

[PATCH v1 6/6] riscv/virt: Jump to pflash if specified

Alistair Francis posted 6 patches 6 years, 1 month ago
Maintainers: Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Alistair Francis <Alistair.Francis@wdc.com>
There is a newer version of this series
[PATCH v1 6/6] riscv/virt: Jump to pflash if specified
Posted by Alistair Francis 6 years, 1 month ago 
If the user supplied pflash to QEMU then change the reset code to jump
to the pflash base address instead of the DRAM base address.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/riscv/virt.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ca002ecea7..ed25cc6761 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -441,6 +441,7 @@ static void riscv_virt_board_init(MachineState *machine)
     MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
     char *plic_hart_config;
     size_t plic_hart_config_len;
+    target_ulong start_addr = memmap[VIRT_DRAM].base;
     int i;
     unsigned int smp_cpus = machine->smp.cpus;
 
@@ -487,6 +488,13 @@ static void riscv_virt_board_init(MachineState *machine)
         }
     }
 
+    if (drive_get(IF_PFLASH, 0, 0)) {
+        /* Pflash was supplied, let's overwrite the address we jump to after
+         * reset to the base of the flash.
+         */
+        start_addr = virt_memmap[VIRT_FLASH].base;
+    }
+
     /* reset vector */
     uint32_t reset_vec[8] = {
         0x00000297,                  /* 1:  auipc  t0, %pcrel_hi(dtb) */
@@ -499,7 +507,7 @@ static void riscv_virt_board_init(MachineState *machine)
 #endif
         0x00028067,                  /*     jr     t0 */
         0x00000000,
-        memmap[VIRT_DRAM].base,      /* start: .dword memmap[VIRT_DRAM].base */
+        start_addr,                  /* start: .dword */
         0x00000000,
                                      /* dtb: */
     };
-- 
2.23.0
Re: [PATCH v1 6/6] riscv/virt: Jump to pflash if specified
Posted by Bin Meng 6 years, 1 month ago 
On Fri, Sep 20, 2019 at 6:35 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> If the user supplied pflash to QEMU then change the reset code to jump
> to the pflash base address instead of the DRAM base address.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  hw/riscv/virt.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index ca002ecea7..ed25cc6761 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -441,6 +441,7 @@ static void riscv_virt_board_init(MachineState *machine)
>      MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
>      char *plic_hart_config;
>      size_t plic_hart_config_len;
> +    target_ulong start_addr = memmap[VIRT_DRAM].base;
>      int i;
>      unsigned int smp_cpus = machine->smp.cpus;
>
> @@ -487,6 +488,13 @@ static void riscv_virt_board_init(MachineState *machine)
>          }
>      }
>
> +    if (drive_get(IF_PFLASH, 0, 0)) {
> +        /* Pflash was supplied, let's overwrite the address we jump to after

nits: wrong multi-line comment format

> +         * reset to the base of the flash.
> +         */
> +        start_addr = virt_memmap[VIRT_FLASH].base;
> +    }
> +
>      /* reset vector */
>      uint32_t reset_vec[8] = {
>          0x00000297,                  /* 1:  auipc  t0, %pcrel_hi(dtb) */
> @@ -499,7 +507,7 @@ static void riscv_virt_board_init(MachineState *machine)
>  #endif
>          0x00028067,                  /*     jr     t0 */
>          0x00000000,
> -        memmap[VIRT_DRAM].base,      /* start: .dword memmap[VIRT_DRAM].base */
> +        start_addr,                  /* start: .dword */
>          0x00000000,
>                                       /* dtb: */
>      };
> --

Otherwise,
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Re: [PATCH v1 6/6] riscv/virt: Jump to pflash if specified
Posted by Philippe Mathieu-Daudé 6 years, 1 month ago 
On 9/20/19 7:15 AM, Bin Meng wrote:
> On Fri, Sep 20, 2019 at 6:35 AM Alistair Francis
> <alistair.francis@wdc.com> wrote:
>>
>> If the user supplied pflash to QEMU then change the reset code to jump
>> to the pflash base address instead of the DRAM base address.
>>
>> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
>> ---
>>  hw/riscv/virt.c | 10 +++++++++-
>>  1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
>> index ca002ecea7..ed25cc6761 100644
>> --- a/hw/riscv/virt.c
>> +++ b/hw/riscv/virt.c
>> @@ -441,6 +441,7 @@ static void riscv_virt_board_init(MachineState *machine)
>>      MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
>>      char *plic_hart_config;
>>      size_t plic_hart_config_len;
>> +    target_ulong start_addr = memmap[VIRT_DRAM].base;
>>      int i;
>>      unsigned int smp_cpus = machine->smp.cpus;
>>
>> @@ -487,6 +488,13 @@ static void riscv_virt_board_init(MachineState *machine)
>>          }
>>      }
>>
>> +    if (drive_get(IF_PFLASH, 0, 0)) {
>> +        /* Pflash was supplied, let's overwrite the address we jump to after
> 
> nits: wrong multi-line comment format
> 
>> +         * reset to the base of the flash.
>> +         */
>> +        start_addr = virt_memmap[VIRT_FLASH].base;
>> +    }
>> +
>>      /* reset vector */
>>      uint32_t reset_vec[8] = {
>>          0x00000297,                  /* 1:  auipc  t0, %pcrel_hi(dtb) */
>> @@ -499,7 +507,7 @@ static void riscv_virt_board_init(MachineState *machine)
>>  #endif
>>          0x00028067,                  /*     jr     t0 */
>>          0x00000000,
>> -        memmap[VIRT_DRAM].base,      /* start: .dword memmap[VIRT_DRAM].base */
>> +        start_addr,                  /* start: .dword */
>>          0x00000000,
>>                                       /* dtb: */
>>      };
>> --
> 
> Otherwise,
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.