On Thu, 19 Sep 2019 15:24:51 PDT (-0700), Alistair Francis wrote:
> This series aims to improve the use of QEMU for developing boot code. It
> does a few things:
>
> - sifive_u machine:
> - Adds a chunk of memory in the Flash area. This allows boot loaders
> to use this memory. I can't find details on the QSPI flash used on
> the real board, so this is the best bet at the moment.
IIRC it's a is25wp256.
> - Adds a chunk of memory in the L2-LIM area. This is actualy the L2
> cache and should shrink as the L2 cache is enalbed. Unfortunatley I
> don't see a nice way to shrink this memory.
> - Adds a property that allows users to specify if QEMU should jump to
> flash or DRAM after the ROM code.
>
> - virt machine:
> - Add the pflash_cfi01 flash device. This is based on the ARM virt
> board implementation
> - Adjusts QEMU to jump to the flash if a user has speciefied any
> pflash.
>
> Both machines have been tested with oreboot, but this should also help
> the coreboot developers.
>
> Alistair Francis (6):
> riscv/sifive_u: Add L2-LIM cache memory
> riscv/sifive_u: Add QSPI memory region
> riscv/sifive_u: Manually define the machine
> riscv/sifive_u: Add the start-in-flash property
> riscv/virt: Add the PFlash CFI01 device
> riscv/virt: Jump to pflash if specified
>
> hw/riscv/Kconfig | 1 +
> hw/riscv/sifive_u.c | 77 +++++++++++++++++++++++++++++--
> hw/riscv/virt.c | 91 ++++++++++++++++++++++++++++++++++++-
> include/hw/riscv/sifive_u.h | 11 ++++-
> include/hw/riscv/virt.h | 3 ++
> 5 files changed, 177 insertions(+), 6 deletions(-)