On 10/16/2026 11:27 AM, Pierrick Bouvier wrote:
> This series adds this target to set of multi-target.
> Changes are straightforward: functions and helpers renaming, and one type
> restriction for this target only.
>
> While the series applies cleanly, it will need those additional two series to
> build multi-target test binary:
>
> - Based-on: 20261016181410.191743-1-pierrick.bouvier@oss.qualcomm.com
> "multi-target: remove dump functions duplication"
> - Based-on: 20261016162509.24854-1-pierrick.bouvier@oss.qualcomm.com
> "multi-target: remove qmp_query_cpu_model_expansion duplication"
>
> Usually I prefer to wait for series to be merged, but I have good hope to catch
> the freeze date if current series is reviewed, and send all three at once.
>
> Pierrick Bouvier (6):
> hw/riscv/virt: restrict scope of virt_is_acpi_enabled to this file
> target/riscv: rename virt_acpi_setup to riscv_virt_acpi_setup
> target/riscv: prefix helpers conflicting with other arch
> target-info: add target_base_riscv
> target/riscv/tcg: restrict tcg-accel-riscv-cpu to riscv targets
> meson.build: add riscv64-softmmu to multi-target
>
> hw/riscv/virt-acpi-build.c | 2 +-
> hw/riscv/virt.c | 12 +++++-----
> include/hw/riscv/virt.h | 3 +--
> include/qemu/target-info.h | 7 ++++++
> meson.build | 1 +
> target-info.c | 11 +++++++++
> target/riscv/helper.h | 24 +++++++++----------
> target/riscv/tcg/bitmanip_helper.c | 4 ++--
> target/riscv/tcg/fpu_helper.c | 16 ++++++-------
> .../tcg/insn_trans/trans_privileged.c.inc | 2 +-
> target/riscv/tcg/insn_trans/trans_rvd.c.inc | 8 +++----
> target/riscv/tcg/insn_trans/trans_rvf.c.inc | 8 +++----
> target/riscv/tcg/insn_trans/trans_rvi.c.inc | 4 ++--
> .../tcg/insn_trans/trans_rvzicfiss.c.inc | 2 +-
> target/riscv/tcg/insn_trans/trans_xlrbr.c.inc | 4 ++--
> target/riscv/tcg/op_helper.c | 4 ++--
> target/riscv/tcg/tcg-cpu.c | 1 +
> target/riscv/tcg/translate.c | 4 ++--
> 18 files changed, 68 insertions(+), 49 deletions(-)
>
Sent v2, making sure riscv virt machine is only available for riscv
targets, and update multi target test to catch this:
https://lore.kernel.org/qemu-devel/20261016232304.1215119-2-pierrick.bouvier@oss.qualcomm.com/T/#
Regards,
Pierrick