Hi,

In this version we added a small addendun in the riscv-server-ref
command line to show how to instantiate a e1000e card with the board.

No other changes made. Patches based based on top of sdext-v10:

"[PATCH v10 0/7] riscv: add initial sdext support"

Changes from v13:
- patch 5:
  - added 'e1000e' command line example
- v12 link: https://lore.kernel.org/qemu-devel/20260917174405.3471736-1-daniel.barboza@oss.qualcomm.com/



Daniel Henrique Barboza (5):
  target/riscv/cpu.c: remove 'bare' condition for .profile
  target/riscv: add riscv-server-ref CPU
  hw/riscv: server platform reference machine
  tests/functional/riscv64: add riscv-server-ref tests
  docs: add riscv-server-ref.rst

 configs/devices/riscv64-softmmu/default.mak |   1 +
 docs/system/riscv/riscv-server-ref.rst      |  65 ++
 docs/system/target-riscv.rst                |   1 +
 hw/riscv/Kconfig                            |  17 +
 hw/riscv/meson.build                        |   1 +
 hw/riscv/server_platform_ref.c              | 776 ++++++++++++++++++++
 target/riscv/cpu-qom.h                      |   1 +
 target/riscv/cpu.c                          |  35 +-
 tests/functional/riscv64/meson.build        |   2 +
 tests/functional/riscv64/test_opensbi.py    |   4 +
 tests/functional/riscv64/test_server_ref.py |  90 +++
 11 files changed, 992 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/riscv/riscv-server-ref.rst
 create mode 100644 hw/riscv/server_platform_ref.c
 create mode 100755 tests/functional/riscv64/test_server_ref.py

-- 
2.43.0

On Mon, 2026-09-28 at 17:11 -0300, Daniel Henrique Barboza wrote:
> Hi,
> 
> In this version we added a small addendun in the riscv-server-ref
> command line to show how to instantiate a e1000e card with the board.
> 
> No other changes made. Patches based based on top of sdext-v10:
> 
> "[PATCH v10 0/7] riscv: add initial sdext support"
> 
> Changes from v13:
> - patch 5:
>   - added 'e1000e' command line example
> - v12 link:
> https://lore.kernel.org/qemu-devel/20260917174405.3471736-1-daniel.barboza@oss.qualcomm.com/
> 
> 
> 
> Daniel Henrique Barboza (5):
>   target/riscv/cpu.c: remove 'bare' condition for .profile
>   target/riscv: add riscv-server-ref CPU
>   hw/riscv: server platform reference machine
>   tests/functional/riscv64: add riscv-server-ref tests
>   docs: add riscv-server-ref.rst

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> 
>  configs/devices/riscv64-softmmu/default.mak |   1 +
>  docs/system/riscv/riscv-server-ref.rst      |  65 ++
>  docs/system/target-riscv.rst                |   1 +
>  hw/riscv/Kconfig                            |  17 +
>  hw/riscv/meson.build                        |   1 +
>  hw/riscv/server_platform_ref.c              | 776
> ++++++++++++++++++++
>  target/riscv/cpu-qom.h                      |   1 +
>  target/riscv/cpu.c                          |  35 +-
>  tests/functional/riscv64/meson.build        |   2 +
>  tests/functional/riscv64/test_opensbi.py    |   4 +
>  tests/functional/riscv64/test_server_ref.py |  90 +++
>  11 files changed, 992 insertions(+), 1 deletion(-)
>  create mode 100644 docs/system/riscv/riscv-server-ref.rst
>  create mode 100644 hw/riscv/server_platform_ref.c
>  create mode 100755 tests/functional/riscv64/test_server_ref.py