[v1] Add hexagon l2vic device

[PATCH 0/7] Add hexagon l2vic device

Brian Cain posted 7 patches 1 week, 4 days ago

Diff against v2
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git fetch https://github.com/patchew-project/qemu tags/patchew/20260714155126.3509544-1-brian.cain@oss.qualcomm.com

Maintainers: Brian Cain <brian.cain@oss.qualcomm.com>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Paolo Bonzini <pbonzini@redhat.com>, Thomas Huth <th.huth+qemu@posteo.eu>, "Philippe Mathieu-Daudé" <philmd@mailo.com>, "Daniel P. Berrangé" <berrange@redhat.com>, Fabiano Rosas <farosas@suse.de>, Laurent Vivier <lvivier@redhat.com>

There is a newer version of this series

MAINTAINERS                                 |   5 +
docs/devel/hexagon-l2vic.rst                |  55 +++
docs/devel/index-internals.rst              |   1 +
include/hw/hexagon/hexagon.h                |   1 +
include/hw/hexagon/hexagon_globalreg.h      |   4 +
include/hw/intc/hex-l2vic.h                 |  87 ++++
include/qemu/bitops.h                       |  30 +-
target/hexagon/cpu.h                        |   2 +
target/hexagon/translate.h                  |   3 +
hw/hexagon/hexagon_dsp.c                    |  20 +
hw/hexagon/hexagon_globalreg.c              |  41 +-
hw/hexagon/virt.c                           |  22 +
hw/intc/hex-l2vic.c                         | 511 ++++++++++++++++++++
target/hexagon/cpu.c                        |   2 +
target/hexagon/genptr.c                     |  14 +-
target/hexagon/op_helper.c                  |  21 +-
target/hexagon/translate.c                  |  56 ++-
tests/qtest/l2vic-test.c                    | 242 +++++++++
hw/hexagon/Kconfig                          |   1 +
hw/intc/Kconfig                             |   3 +
hw/intc/meson.build                         |   2 +
hw/intc/trace-events                        |   4 +
tests/functional/hexagon/meson.build        |   5 +
tests/functional/hexagon/test_arch_tests.py |  65 +++
tests/functional/meson.build                |   1 +
tests/qtest/meson.build                     |   2 +-
26 files changed, 1168 insertions(+), 32 deletions(-)
create mode 100644 docs/devel/hexagon-l2vic.rst
create mode 100644 include/hw/intc/hex-l2vic.h
create mode 100644 hw/intc/hex-l2vic.c
create mode 100644 tests/qtest/l2vic-test.c
create mode 100644 tests/functional/hexagon/meson.build
create mode 100755 tests/functional/hexagon/test_arch_tests.py

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[PATCH 0/7] Add hexagon l2vic device

Posted by Brian Cain 1 week, 4 days ago

This is a follow-up to the previous system emulation series which
introduced hex-l2vic.  The device implementation has been reworked
and should address the feedback from previous threads.

Brian Cain (6):
  target/hexagon: initialize deferred sreg-write temps to current value
  target/hexagon: fix PC not advancing for non-COF TB-ending packets
  bitops.h: Add find_first_bit32()
  hw/hexagon: connect l2vic device
  tests/qtest: add L2VIC qtest
  tests/functional/hexagon: add arch_tests functional test

Sid Manning (1):
  hw/intc: Add l2vic interrupt controller

 MAINTAINERS                                 |   5 +
 docs/devel/hexagon-l2vic.rst                |  55 +++
 docs/devel/index-internals.rst              |   1 +
 include/hw/hexagon/hexagon.h                |   1 +
 include/hw/hexagon/hexagon_globalreg.h      |   4 +
 include/hw/intc/hex-l2vic.h                 |  87 ++++
 include/qemu/bitops.h                       |  30 +-
 target/hexagon/cpu.h                        |   2 +
 target/hexagon/translate.h                  |   3 +
 hw/hexagon/hexagon_dsp.c                    |  20 +
 hw/hexagon/hexagon_globalreg.c              |  41 +-
 hw/hexagon/virt.c                           |  22 +
 hw/intc/hex-l2vic.c                         | 511 ++++++++++++++++++++
 target/hexagon/cpu.c                        |   2 +
 target/hexagon/genptr.c                     |  14 +-
 target/hexagon/op_helper.c                  |  21 +-
 target/hexagon/translate.c                  |  56 ++-
 tests/qtest/l2vic-test.c                    | 242 +++++++++
 hw/hexagon/Kconfig                          |   1 +
 hw/intc/Kconfig                             |   3 +
 hw/intc/meson.build                         |   2 +
 hw/intc/trace-events                        |   4 +
 tests/functional/hexagon/meson.build        |   5 +
 tests/functional/hexagon/test_arch_tests.py |  65 +++
 tests/functional/meson.build                |   1 +
 tests/qtest/meson.build                     |   2 +-
 26 files changed, 1168 insertions(+), 32 deletions(-)
 create mode 100644 docs/devel/hexagon-l2vic.rst
 create mode 100644 include/hw/intc/hex-l2vic.h
 create mode 100644 hw/intc/hex-l2vic.c
 create mode 100644 tests/qtest/l2vic-test.c
 create mode 100644 tests/functional/hexagon/meson.build
 create mode 100755 tests/functional/hexagon/test_arch_tests.py

-- 
2.34.1